From afcd48a2f16592f972f635783048024b2a06a771 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 13 Jul 2023 01:21:16 +0200 Subject: vc/amd/phoenix/platform_descriptor: clarify link_compliance_mode comment When set to 1, the link_compliance_mode element of the DXIO port descriptor will cause the corresponding PCIe port to not be trained but to output a compliance testing pattern instead. Update the comment to point out that this is only a testing mode. Signed-off-by: Felix Held Change-Id: Iaabb16c51a0c08391cd2d63b8064c524a748ccb8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76441 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/vendorcode/amd/fsp/phoenix/platform_descriptors.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/vendorcode/amd/fsp') diff --git a/src/vendorcode/amd/fsp/phoenix/platform_descriptors.h b/src/vendorcode/amd/fsp/phoenix/platform_descriptors.h index 9335aa7cff..983c4c983c 100644 --- a/src/vendorcode/amd/fsp/phoenix/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/phoenix/platform_descriptors.h @@ -192,7 +192,7 @@ typedef struct __packed { uint8_t slot_power_limit; // PCIe slot power limit uint32_t slot_power_limit_scale :2; // PCIe slot power limit scale uint32_t :6; - uint32_t link_compliance_mode :1; // Force port into compliance mode + uint32_t link_compliance_mode :1; // Force port into compliance testing mode uint32_t link_safe_mode :1; // Safe mode capability uint32_t sb_link :1; // Link type uint32_t clk_pm_support :1; // Clock power management support -- cgit v1.2.3