From d4e07090ffb3420f5aa11d8a92dd61c8074412b4 Mon Sep 17 00:00:00 2001 From: Jon Murphy Date: Wed, 29 Jun 2022 11:56:20 -0600 Subject: soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina Sabrina previously didn't support UART mapping in psp verstage. Now that it has been enabled, add the relevant uart code here. BUG=b:218709292 TEST=Set serial soft fuse, boot to kernel, check logs Signed-off-by: Jon Murphy Change-Id: I591fa69b6e722929839babfff62e9d56c68e1112 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65532 Reviewed-by: Raul Rangel Reviewed-by: Karthik Ramasubramanian Tested-by: build bot (Jenkins) --- src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/vendorcode/amd/fsp/sabrina') diff --git a/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h index 48c35e54ac..79e3adfb91 100644 --- a/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h +++ b/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h @@ -91,9 +91,16 @@ enum fch_io_device { FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_UART, FCH_IO_DEVICE_END, }; +enum fch_uart_id { + FCH_UART_ID_0 = 0, + FCH_UART_ID_1 = 1, + FCH_UART_ID_MAX, +}; + enum fch_i2c_controller_id { FCH_I2C_CONTROLLER_ID_0 = 0, FCH_I2C_CONTROLLER_ID_1 = 1, -- cgit v1.2.3