From 799fed98ea57fc9632b7bf95b3f1d79519cbdd15 Mon Sep 17 00:00:00 2001
From: Kerry She <Kerry.she@amd.com>
Date: Sat, 1 Jan 2011 17:44:07 +0000
Subject: Add AMD SB800 southbridge CIMx code.

The main CIMx code is in a src/vendorcode directory and should not be
changed with regard to coding style etc. in order to remain easily syncable
with the "upstream" AMD code.

Signed-off-by: Kerry She <Kerry.she@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6229 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/vendorcode/amd/cimx/sb800/IOLIB.c | 81 +++++++++++++++++++++++++++++++++++
 1 file changed, 81 insertions(+)
 create mode 100644 src/vendorcode/amd/cimx/sb800/IOLIB.c

(limited to 'src/vendorcode/amd/cimx/sb800/IOLIB.c')

diff --git a/src/vendorcode/amd/cimx/sb800/IOLIB.c b/src/vendorcode/amd/cimx/sb800/IOLIB.c
new file mode 100644
index 0000000000..65344c203f
--- /dev/null
+++ b/src/vendorcode/amd/cimx/sb800/IOLIB.c
@@ -0,0 +1,81 @@
+/*
+ *****************************************************************************
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ * ***************************************************************************
+ *
+ */
+
+#include "SBPLATFORM.h"
+
+
+VOID
+ReadIO (
+  IN       UINT16 Address,
+  IN       UINT8 OpFlag,
+  IN       VOID* Value
+  )
+{
+  OpFlag = OpFlag & 0x7f;
+  switch ( OpFlag ) {
+  case AccWidthUint8:
+    *(UINT8*)Value = ReadIo8 (Address);
+    break;
+  case AccWidthUint16:
+    *(UINT16*)Value = ReadIo16 (Address);
+    break;
+  case AccWidthUint32:
+    *(UINT32*)Value = ReadIo32 (Address);
+    break;
+  }
+}
+
+VOID
+WriteIO (
+  IN       UINT16 Address,
+  IN       UINT8 OpFlag,
+  IN       VOID* Value
+  )
+{
+  OpFlag = OpFlag & 0x7f;
+  switch ( OpFlag ) {
+  case AccWidthUint8:
+    WriteIo8 (Address, *(UINT8*)Value);
+    break;
+  case AccWidthUint16:
+    WriteIo16 (Address, *(UINT16*)Value);
+    break;
+  case AccWidthUint32:
+    WriteIo32 (Address, *(UINT32*)Value);
+    break;
+  }
+}
+
+VOID
+RWIO (
+  IN       UINT16 Address,
+  IN       UINT8 OpFlag,
+  IN       UINT32 Mask,
+  IN       UINT32 Data
+  )
+{
+  UINT32 Result;
+  ReadIO (Address, OpFlag, &Result);
+  Result = (Result & Mask) | Data;
+  WriteIO (Address, OpFlag, &Result);
+}
-- 
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