From 0f6c0b1a6f062be702fd0b10a6c591c42f982b63 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 7 Sep 2017 06:46:46 +0300 Subject: AGESA: Drop CAR teardown without POSTCAR_STAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Except for family15, all AGESA boards have moved away from AGESA_LEGACY_WRAPPER, thus they all have POSTCAR_STAGE now. AGESA family15 boards remain at AGESA_LEGACY=y, but those boards have per-board romstage.c files and are not touched here. Change-Id: If750766cc7a9ecca4641a8f14e1ab15e9abb7ff5 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/18632 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/vendorcode/amd/agesa/f16kb/gcccar.inc | 32 +++---------------------------- 1 file changed, 3 insertions(+), 29 deletions(-) (limited to 'src/vendorcode/amd/agesa/f16kb') diff --git a/src/vendorcode/amd/agesa/f16kb/gcccar.inc b/src/vendorcode/amd/agesa/f16kb/gcccar.inc index 8ad4d1ddc4..c818d970bf 100644 --- a/src/vendorcode/amd/agesa/f16kb/gcccar.inc +++ b/src/vendorcode/amd/agesa/f16kb/gcccar.inc @@ -269,13 +269,6 @@ MSR_MASK = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN)) * Read family specific values to determine the node and core * numbers for the core executing this code. * -* Note: Customized for coreboot: -* A wbinvd is used to send cache to memory. The existing stack is preserved -* at its original location and additional information is preserved (e.g. -* coreboot CAR globals, heap structures, etc.). This implementation should -* NOT be used with S3 resume IF the stack/cache area is not reserved and -* over system memory. -* * Inputs: * none * Outputs: @@ -609,17 +602,7 @@ fam16_disable_stack_remote_read_exit: _RDMSR btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - - #-------------------------------------------------------------------------- - # Send cache to memory. Preserve stack and coreboot CAR globals. - # This shouldn't be used with S3 resume IF the stack/cache area is - # not reserved and over system memory. - #-------------------------------------------------------------------------- -#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) - wbinvd -#else - invd -#endif + invd # Clear the cache tag RAMs #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h @@ -1264,17 +1247,8 @@ ClearTheStack: # Stack base is in SS, stack pointer is .endm /***************************************************************************** -* AMD_DISABLE_STACK: Implementation is modified for coreboot from -* the original AMD intent. A WBINVD is used in the HOOK -* to send dirty cache contents to DRAM backing before -* disabling cache-as-ram. This is not safe for S3 resume. -* -* todo: -* * rework PI/AGESA source to set DRAM to UC to send -* writes directly to memory -* * move DCACHE_BASE or use postcar stage for teardown -* to eliminate car_migrated problem that will occur -* after wbinvd is changed back to invd +* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine +* should only be executed on the BSP * * In: * none -- cgit v1.2.3