From 6b688f5329e560ef432f6ea281b2fe3d905ef297 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 12 Feb 2021 13:49:11 +0100 Subject: src: use ARRAY_SIZE where possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Generated with a variant of https://coccinelle.gitlabpages.inria.fr/website/rules/array.cocci Change-Id: I083704fd48faeb6c67bba3367fbcfe554a9f7c66 Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/c/coreboot/+/50594 Reviewed-by: Angel Pons Reviewed-by: HAOUAS Elyes Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3') diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c index 113386e20b..f632337a3b 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c @@ -207,12 +207,12 @@ MemConstructTechBlock3 ( // // Initialize the SPD pointers for each Dimm // - for (i = 0 ; i < (sizeof (ChannelPtr->DimmSpdPtr) / sizeof (ChannelPtr->DimmSpdPtr[0])) ; i++) { + for (i = 0 ; i < ARRAY_SIZE(ChannelPtr->DimmSpdPtr); i++) { ChannelPtr->DimmSpdPtr[i] = NULL; } for (i = 0 ; i < DimmSlots; i++) { ChannelPtr->DimmSpdPtr[i] = &(ChannelPtr->SpdPtr[i]); - if ( (i + 2) < (sizeof (ChannelPtr->DimmSpdPtr) / sizeof (ChannelPtr->DimmSpdPtr[0]))) { + if ( (i + 2) < ARRAY_SIZE(ChannelPtr->DimmSpdPtr)) { if (ChannelPtr->DimmSpdPtr[i]->DimmPresent) { if ((((ChannelPtr->DimmSpdPtr[i]->Data[SPD_RANKS] >> 3) & 0x07) + 1) > 2) { ChannelPtr->DimmSpdPtr[i + 2] = &(ChannelPtr->SpdPtr[i]); -- cgit v1.2.3