From 334e8360efb03644488ce4ac8a9a9e75ef6fa6c0 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Thu, 23 Aug 2018 00:50:08 +0300 Subject: src/vendorcode/amd/agesa/f15tn: Update microcode to version 0x600111F 2018-03-05 This microcode update for CPU IDs 0x610F01/0x610F31 improves system stability: in particular, fixes Xen hardware virtualization freezes. Also it attempts to patch some Spectre-related security vulnerabilities. This new microcode has been tested by multiple coreboot community members and found working perfectly. Old version: 0x600110F [2012-01-11] replaced by New version: 0x600111F [2018-03-05] Change-Id: Ied5da0ff85abb63c2db2eeafd051b8e00916d961 Signed-off-by: Mike Banon Reviewed-on: https://review.coreboot.org/c/coreboot/+/28273 Reviewed-by: Martin Roth Reviewed-by: Tested-by: build bot (Jenkins) --- src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h') diff --git a/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h b/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h index f0d9194018..bd00756c43 100644 --- a/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h +++ b/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h @@ -808,9 +808,9 @@ extern F_IS_NB_PSTATE_ENABLED F15IsNbPstateEnabled; #define F15_TN_UCODE_0E #if AGESA_ENTRY_INIT_EARLY == TRUE - extern CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600110F_Enc []; + extern CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600111F_Enc []; #undef F15_TN_UCODE_10F - #define F15_TN_UCODE_10F CpuF15TnMicrocodePatch0600110F_Enc, + #define F15_TN_UCODE_10F CpuF15TnMicrocodePatch0600111F_Enc, #endif -- cgit v1.2.3