From 84cbce2364cf3e40f24ba37b2f72a711a2e50f58 Mon Sep 17 00:00:00 2001 From: efdesign98 Date: Thu, 4 Aug 2011 12:09:17 -0600 Subject: Update AMD F14 Agesa to support Rev C0 cpus This change updates the AMD Agesa code to support the Family 14 rev C0 cpus. It also fixes (again) a ton of warnings, although not all of them are gone. The warning fixes affect code in the Family 12 tree as well, so there are some small changes therein. This code has been tested on a Persimmon and passes Abuild. This is the first (and largest) of a number of commits to complete the upgrade. Change-Id: Id28d9bf7931f8baa2a602f6bb096a5a465ccd20d Signed-off-by: Frank Vibrans Signed-off-by: efdesign98 Reviewed-on: http://review.coreboot.org/131 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/vendorcode/amd/agesa/f14/AMD.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/vendorcode/amd/agesa/f14/AMD.h') diff --git a/src/vendorcode/amd/agesa/f14/AMD.h b/src/vendorcode/amd/agesa/f14/AMD.h index f788da8476..5c77c58269 100644 --- a/src/vendorcode/amd/agesa/f14/AMD.h +++ b/src/vendorcode/amd/agesa/f14/AMD.h @@ -167,7 +167,7 @@ typedef struct { IN UINT32 AltImageBasePtr; ///< Alternate Image location IN CALLOUT_ENTRY CalloutPtr; ///< For Callout from AGESA IN UINT8 HeapStatus; ///< For heap status from boot time slide. - IN UINT64 HeapBasePtr; ///< Location of the heap + IN VOID *HeapBasePtr; ///< Location of the heap IN OUT UINT8 Reserved[7]; ///< This space is reserved for future use. } AMD_CONFIG_PARAMS; -- cgit v1.2.3