From 843b9941632fea91227a7e46b0f083aa8d80b980 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Wed, 29 Aug 2018 01:10:46 +0300 Subject: src/vendorcode/amd/agesa/f12: Update microcode to version 0x3000027 2011-09-13 This microcode update for CPU ID 0x300F10 should improve the system stability. It is a part of microcode_amd.bin officially released by AMD at linux-firmware: it starts at 0x217C offset, and size is 0x03C0 as specified priorly at 0x2178. Old version: 0x300000F [2010-04-10] replaced by New version: 0x3000027 [2011-09-13] Change-Id: I9650fab377d957904318ebb393323c2509cfea26 Signed-off-by: Mike Banon Reviewed-on: https://review.coreboot.org/28378 Reviewed-by: Paul Menzel Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h') diff --git a/src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h b/src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h index ca0f79d712..215342d301 100644 --- a/src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h +++ b/src/vendorcode/amd/agesa/f12/Config/OptionFamily12hInstall.h @@ -337,9 +337,9 @@ extern F_IS_NB_PSTATE_ENABLED F12IsNbPstateEnabled; #define F12_LN_UCODE_0F #if AGESA_ENTRY_INIT_EARLY == TRUE - extern CONST MICROCODE_PATCHES ROMDATA CpuF12MicrocodePatch0300000f; + extern CONST MICROCODE_PATCHES ROMDATA CpuF12MicrocodePatch03000027; #undef F12_LN_UCODE_0F - #define F12_LN_UCODE_0F &CpuF12MicrocodePatch0300000f, + #define F12_LN_UCODE_0F &CpuF12MicrocodePatch03000027, #if OPTION_EARLY_SAMPLES == TRUE extern CONST MICROCODE_PATCHES ROMDATA CpuF12MicrocodePatch03000002; extern CONST MICROCODE_PATCHES ROMDATA CpuF12MicrocodePatch0300000e; -- cgit v1.2.3