From d91ddc8d3181b8ab23726c8e744093f39473c202 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 30 Jul 2015 11:17:40 -0700 Subject: vendorcode/amd: 64bit fixes Change-Id: I6a0752cf0c0e484e670acca97c4991b5578845fb Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/11081 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/vendorcode/amd/agesa/f10/Makefile.inc | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/vendorcode/amd/agesa/f10/Makefile.inc') diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index fe4a797d5c..e0aa00dcd1 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -47,15 +47,21 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem ## AGESA need sse feature ## CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) ####################################################################### classes-y += libagesa +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) $(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif #libagesa-y += Proc/CPU/Family/0x10/F10IoCstate.c #libagesa-y += Proc/CPU/Feature/cpuIoCstate.c -- cgit v1.2.3