From 7774de53d49b612888603824f24ea5f258feeba1 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 30 Mar 2020 16:46:18 +0200 Subject: superio/nuvoton: Improve code formatting Change-Id: I8cdfa5c3e3508ea8ad969df6513401611a066fc5 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/39930 Reviewed-by: Felix Held Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/superio/nuvoton/nct5104d/nct5104d.h | 2 +- src/superio/nuvoton/npcd378/npcd378.h | 3 +-- src/superio/nuvoton/npcd378/superio.c | 6 ++---- 3 files changed, 4 insertions(+), 7 deletions(-) (limited to 'src/superio') diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h index b65e805ddf..679b21af57 100644 --- a/src/superio/nuvoton/nct5104d/nct5104d.h +++ b/src/superio/nuvoton/nct5104d/nct5104d.h @@ -26,7 +26,7 @@ #define NCT5104D_FDC 0x00 /* FDC - not pinned out */ #define NCT5104D_SP1 0x02 /* UARTA */ #define NCT5104D_SP2 0x03 /* UARTB */ -#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select */ +#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select */ #define NCT5104D_SP3 0x10 /* UARTC */ #define NCT5104D_SP4 0x11 /* UARTD */ #define NCT5104D_PORT80 0x14 /* PORT 80 */ diff --git a/src/superio/nuvoton/npcd378/npcd378.h b/src/superio/nuvoton/npcd378/npcd378.h index f2fd87b27e..98d50e53a0 100644 --- a/src/superio/nuvoton/npcd378/npcd378.h +++ b/src/superio/nuvoton/npcd378/npcd378.h @@ -31,8 +31,7 @@ uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg); * @param reg MSB is page, LSB sets the offset in selected page * @param val The value to write to HWM register */ -void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, - const uint8_t val); +void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val); /* * Notify SuperIO a host-to-device transfer is ongoing. diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c index a07afdc79c..95a4babbb7 100644 --- a/src/superio/nuvoton/npcd378/superio.c +++ b/src/superio/nuvoton/npcd378/superio.c @@ -26,8 +26,7 @@ uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg) return reg8; } -void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, - const uint8_t val) +void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val) { outb((reg >> 8) & 0xf, iobase + 0xff); outb(val, iobase + (reg & 0xff)); @@ -65,8 +64,7 @@ static void npcd378_init(struct device *dev) case NPCD378_HWM: res = find_resource(dev, PNP_IDX_IO0); if (!res || !res->base) { - printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", - NPCD378_HWM); + printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", NPCD378_HWM); break; } -- cgit v1.2.3