From a69d978be8a068944466e776de87527fb104a878 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Mon, 15 Nov 2010 19:35:14 +0000 Subject: C and other Super I/O cosmetic fixes. - Random coding style, whitespace and cosmetic fixes. - Consistently use the same spacing and 4-hexdigit port number format in the pnp_dev_info[] arrays. - Drop dead/unused code and less useful comments. - Add missing "(C)" characters and copyright years. - Shorten and simplify some code snippets. - Use u8/u16/etc. everywhere. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/superio/winbond/w83627uhg/superio.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'src/superio/winbond/w83627uhg/superio.c') diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index ed22b2166c..a132446352 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -145,21 +145,21 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, W83627UHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627UHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627UHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627UHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627UHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &ops, W83627UHG_SP3, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627UHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, + { &ops, W83627UHG_SP3, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, { &ops, W83627UHG_GPIO3_4, }, { &ops, W83627UHG_WDTO_PLED_GPIO5_6, }, - { &ops, W83627UHG_GPIO1_2,}, - { &ops, W83627UHG_ACPI, PNP_IRQ0, }, - { &ops, W83627UHG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, - { &ops, W83627UHG_PECI_SST,}, - { &ops, W83627UHG_SP4, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627UHG_SP5, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627UHG_SP6, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627UHG_GPIO1_2, }, + { &ops, W83627UHG_ACPI, PNP_IRQ0, }, + { &ops, W83627UHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, W83627UHG_PECI_SST, }, + { &ops, W83627UHG_SP4, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_SP5, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, W83627UHG_SP6, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, }; static void enable_dev(device_t dev) -- cgit v1.2.3