From e91619ac0595f1fe8adf61df75e79ecf79800e86 Mon Sep 17 00:00:00 2001 From: "Steven J. Magnani" Date: Mon, 12 Sep 2005 18:55:23 +0000 Subject: Initial revision. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/superio/smsc/lpc47b272/Config.lb | 2 + src/superio/smsc/lpc47b272/chip.h | 17 ++ src/superio/smsc/lpc47b272/lpc47b272.h | 8 + .../smsc/lpc47b272/lpc47b272_early_serial.c | 68 ++++++ src/superio/smsc/lpc47b272/superio.c | 227 +++++++++++++++++++++ 5 files changed, 322 insertions(+) create mode 100644 src/superio/smsc/lpc47b272/Config.lb create mode 100644 src/superio/smsc/lpc47b272/chip.h create mode 100644 src/superio/smsc/lpc47b272/lpc47b272.h create mode 100644 src/superio/smsc/lpc47b272/lpc47b272_early_serial.c create mode 100644 src/superio/smsc/lpc47b272/superio.c (limited to 'src/superio/smsc/lpc47b272') diff --git a/src/superio/smsc/lpc47b272/Config.lb b/src/superio/smsc/lpc47b272/Config.lb new file mode 100644 index 0000000000..f62a567d61 --- /dev/null +++ b/src/superio/smsc/lpc47b272/Config.lb @@ -0,0 +1,2 @@ +config chip.h +object superio.o diff --git a/src/superio/smsc/lpc47b272/chip.h b/src/superio/smsc/lpc47b272/chip.h new file mode 100644 index 0000000000..5494cc136e --- /dev/null +++ b/src/superio/smsc/lpc47b272/chip.h @@ -0,0 +1,17 @@ +#ifndef SIO_COM1 +#define SIO_COM1_BASE 0x3F8 +#endif +#ifndef SIO_COM2 +#define SIO_COM2_BASE 0x2F8 +#endif + +struct chip_operations; +extern struct chip_operations superio_smsc_lpc47b272_ops; + +#include +#include + +struct superio_smsc_lpc47b272_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h new file mode 100644 index 0000000000..486b858084 --- /dev/null +++ b/src/superio/smsc/lpc47b272/lpc47b272.h @@ -0,0 +1,8 @@ +#define LPC47B272_FDC 0 /* Floppy */ +#define LPC47B272_PP 3 /* Parallel Port */ +#define LPC47B272_SP1 4 /* Com1 */ +#define LPC47B272_SP2 5 /* Com2 */ +#define LPC47B272_KBC 7 /* Keyboard & Mouse */ +#define LPC47B272_RT 10 /* Runtime reg*/ + +#define LPC47B272_MAX_CONFIG_REGISTER 0x5F diff --git a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c new file mode 100644 index 0000000000..837359d368 --- /dev/null +++ b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c @@ -0,0 +1,68 @@ +/* + * $Header$ + * + * lpc47b272_early_serial.c: Pre-RAM driver for SMSC LPC47B272 Super I/O chip + * + * Copyright (C) 2005 Digital Design Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * $Log$ + * + */ + +#include +#include "lpc47b272.h" + +//---------------------------------------------------------------------------------- +// Function: pnp_enter_conf_state +// Parameters: dev - high 8 bits = Super I/O port +// Return Value: None +// Description: Enable access to the LPC47B272's configuration registers. +// +static inline void pnp_enter_conf_state(device_t dev) { + unsigned port = dev>>8; + outb(0x55, port); +} + +//---------------------------------------------------------------------------------- +// Function: pnp_exit_conf_state +// Parameters: dev - high 8 bits = Super I/O port +// Return Value: None +// Description: Disable access to the LPC47B272's configuration registers. +// +static void pnp_exit_conf_state(device_t dev) { + unsigned port = dev>>8; + outb(0xaa, port); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47b272_enable_serial +// Parameters: dev - high 8 bits = Super I/O port, +// low 8 bits = logical device number (per lpc47b272.h) +// iobase - processor I/O port address to assign to this serial device +// Return Value: bool +// Description: Configure the base I/O port of the specified serial device +// and enable the serial device. +// +static void lpc47b272_enable_serial(device_t dev, unsigned iobase) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_conf_state(dev); +} diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c new file mode 100644 index 0000000000..91b63094ac --- /dev/null +++ b/src/superio/smsc/lpc47b272/superio.c @@ -0,0 +1,227 @@ +/* + * $Header$ + * + * superio.c: RAM driver for SMSC LPC47B272 Super I/O chip + * + * Copyright 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan + * Copyright (C) 2005 Digital Design Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * $Log$ + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "chip.h" +#include "lpc47b272.h" + +// Forward declarations +static void enable_dev(device_t dev); +void lpc47b272_pnp_set_resources(device_t dev); +void lpc47b272_pnp_set_resources(device_t dev); +void lpc47b272_pnp_enable_resources(device_t dev); +void lpc47b272_pnp_enable(device_t dev); +static void lpc47b272_init(device_t dev); + +static void pnp_enter_conf_state(device_t dev); +static void pnp_exit_conf_state(device_t dev); +static void dump_pnp_device(device_t dev); + + +struct chip_operations superio_smsc_lpc47b272_ops = { + CHIP_NAME("smsc lpc47b272") + .enable_dev = enable_dev +}; + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = lpc47b272_pnp_set_resources, + .enable_resources = lpc47b272_pnp_enable_resources, + .enable = lpc47b272_pnp_enable, + .init = lpc47b272_init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, LPC47B272_RT, PNP_IO0, { 0x780, 0 }, }, +}; + +/**********************************************************************************/ +/* PUBLIC INTERFACE */ +/**********************************************************************************/ + +//---------------------------------------------------------------------------------- +// Function: enable_dev +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Create device structures and allocate resources to devices +// specified in the pnp_dev_info array (above). +// +static void enable_dev(device_t dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + pnp_dev_info); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47b272_pnp_set_resources +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Configure the specified Super I/O device with the resources +// (I/O space, etc.) that have been allocated for it. +// +void lpc47b272_pnp_set_resources(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_set_resources(dev); + pnp_exit_conf_state(dev); +} + +void lpc47b272_pnp_enable_resources(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_enable_resources(dev); + pnp_exit_conf_state(dev); +} + +void lpc47b272_pnp_enable(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + + if(dev->enabled) { + pnp_set_enable(dev, 1); + } + else { + pnp_set_enable(dev, 0); + } + pnp_exit_conf_state(dev); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47b272_init +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Initialize the specified Super I/O device. +// Devices other than COM ports and the keyboard controller are +// ignored. For COM ports, we configure the baud rate. +// +static void lpc47b272_init(device_t dev) +{ + struct superio_smsc_lpc47b272_config *conf = dev->chip_info; + struct resource *res0, *res1; + + if (!dev->enabled) + return; + + switch(dev->path.u.pnp.device) { + case LPC47B272_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + + case LPC47B272_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + + case LPC47B272_KBC: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + } +} + +/**********************************************************************************/ +/* PRIVATE FUNCTIONS */ +/**********************************************************************************/ + +//---------------------------------------------------------------------------------- +// Function: pnp_enter_conf_state +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Enable access to the LPC47B272's configuration registers. +// +static void pnp_enter_conf_state(device_t dev) +{ + outb(0x55, dev->path.u.pnp.port); +} + +//---------------------------------------------------------------------------------- +// Function: pnp_exit_conf_state +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Disable access to the LPC47B272's configuration registers. +// +static void pnp_exit_conf_state(device_t dev) +{ + outb(0xaa, dev->path.u.pnp.port); +} + +#if 0 +//---------------------------------------------------------------------------------- +// Function: dump_pnp_device +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Print the values of all of the LPC47B272's configuration registers. +// NOTE: The LPC47B272 must be in configuration mode when this +// function is called. +// +static void dump_pnp_device(device_t dev) +{ + int register_index; + print_debug("\r\n"); + + for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) { + uint8_t register_value; + + if ((register_index & 0x0f) == 0) { + print_debug_hex8(register_index); + print_debug_char(':'); + } + + // Skip over 'register' that would cause exit from configuration mode + if (register_index == 0xaa) + register_value = 0xaa; + else + register_value = pnp_read_config(dev, register_index); + + print_debug_char(' '); + print_debug_hex8(register_value); + if ((register_index & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } + + print_debug("\r\n"); +} +#endif -- cgit v1.2.3