From 449fb9b6eb886a6bd364f9f5c5617e30152c013d Mon Sep 17 00:00:00 2001 From: Omar Pakker Date: Fri, 29 Jul 2016 19:05:33 +0200 Subject: superio/nuvoton: Add Nuvoton NCT6791D This adds support for Nuvoton NCT6791D Super I/O chips. Makes use of the common Nuvoton early_serial.c. Based on the Datasheet supplied by Nuvoton. Datasheet Version: January 8th, 2016 Revision 1.11 Change-Id: I027d33b85f0dc6ee50deebdccaecc74487eecb40 Signed-off-by: Omar Pakker Reviewed-on: https://review.coreboot.org/15967 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/superio/nuvoton/nct6791d/superio.c | 102 +++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 src/superio/nuvoton/nct6791d/superio.c (limited to 'src/superio/nuvoton/nct6791d/superio.c') diff --git a/src/superio/nuvoton/nct6791d/superio.c b/src/superio/nuvoton/nct6791d/superio.c new file mode 100644 index 0000000000..0a0f0bed59 --- /dev/null +++ b/src/superio/nuvoton/nct6791d/superio.c @@ -0,0 +1,102 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Felix Held + * Copyright (C) 2014 Edward O'Callaghan + * Copyright (C) 2015 Matt DeVillier + * Copyright (C) 2016 Omar Pakker + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#include "nct6791d.h" + + +static void nct6791d_init(struct device *dev) +{ + if (!dev->enabled) + return; + + switch (dev->path.pnp.device) { + case NCT6791D_KBC: + pc_keyboard_init(NO_AUX_DEVICE); + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = nct6791d_init, + .ops_pnp_mode = &pnp_conf_mode_8787_aa, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, NCT6791D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_SP1, PNP_IO0 | PNP_IRQ0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_SP2, PNP_IO0 | PNP_IRQ0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, + {0x0fff, 0}, {0x0fff, 4}, }, + { &ops, NCT6791D_CIR, PNP_IO0 | PNP_IRQ0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_ACPI}, + { &ops, NCT6791D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, + {0x0ffe, 0}, {0x0ffe, 4}, }, + { &ops, NCT6791D_BCLK_WDT2_WDTMEM}, + { &ops, NCT6791D_CIRWUP, PNP_IO0 | PNP_IRQ0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_GPIO_PP_OD}, + { &ops, NCT6791D_PORT80}, + { &ops, NCT6791D_WDT1}, + { &ops, NCT6791D_WDTMEM}, + { &ops, NCT6791D_GPIOBASE, PNP_IO0, + {0x0ff8, 0}, }, + { &ops, NCT6791D_GPIO0}, + { &ops, NCT6791D_GPIO1}, + { &ops, NCT6791D_GPIO2}, + { &ops, NCT6791D_GPIO3}, + { &ops, NCT6791D_GPIO4}, + { &ops, NCT6791D_GPIO5}, + { &ops, NCT6791D_GPIO6}, + { &ops, NCT6791D_GPIO7}, + { &ops, NCT6791D_GPIO8}, + { &ops, NCT6791D_DS5}, + { &ops, NCT6791D_DS3}, + { &ops, NCT6791D_PCHDSW}, + { &ops, NCT6791D_DSWWOPT}, + { &ops, NCT6791D_DS3OPT}, + { &ops, NCT6791D_DSDSS}, + { &ops, NCT6791D_DSPU}, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nuvoton_nct6791d_ops = { + CHIP_NAME("NUVOTON NCT6791D Super I/O") + .enable_dev = enable_dev, +}; + -- cgit v1.2.3