From da2daef4b43ac85657429fe9b3f4a6d18179d48d Mon Sep 17 00:00:00 2001 From: Dave Frodin Date: Mon, 9 Jun 2014 12:33:24 -0600 Subject: superio/nuvoton: Adds a function to route pins 41-48 to UARTD Pins 41-48 default to being GPIs. This switches the internal mux to connect them to UARTD. Change-Id: I61393b8c35cbc664f6520f60eed09ba4bbede0dc Signed-off-by: Dave Frodin Reviewed-on: http://review.coreboot.org/5963 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/superio/nuvoton/nct5104d/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/superio/nuvoton/nct5104d/Makefile.inc') diff --git a/src/superio/nuvoton/nct5104d/Makefile.inc b/src/superio/nuvoton/nct5104d/Makefile.inc index fcb5ec22c3..b6278bad1d 100644 --- a/src/superio/nuvoton/nct5104d/Makefile.inc +++ b/src/superio/nuvoton/nct5104d/Makefile.inc @@ -19,3 +19,4 @@ ## ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += superio.c +romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += early_init.c -- cgit v1.2.3