From e7705f2df1247112572f96f606b111b94d04fa2c Mon Sep 17 00:00:00 2001 From: Peter Lemenkov Date: Sun, 10 Feb 2019 23:03:17 +0100 Subject: superio/nsc: Introduce common early_serial Change-Id: I0860e95258b87f059a3a9c31e382d758403d0428 Signed-off-by: Peter Lemenkov Reviewed-on: https://review.coreboot.org/c/31332 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Felix Held --- src/superio/nsc/common/nsc.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 src/superio/nsc/common/nsc.h (limited to 'src/superio/nsc/common/nsc.h') diff --git a/src/superio/nsc/common/nsc.h b/src/superio/nsc/common/nsc.h new file mode 100644 index 0000000000..76112dc4fa --- /dev/null +++ b/src/superio/nsc/common/nsc.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Edward O'Callaghan + * Copyright (C) 2014 Felix Held + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SUPERIO_NSC_COMMON_PRE_RAM_H +#define SUPERIO_NSC_COMMON_PRE_RAM_H + +#include +#include + +void nsc_enable_serial(pnp_devfn_t dev, u16 iobase); + +#endif /* SUPERIO_NSC_COMMON_PRE_RAM_H */ -- cgit v1.2.3