From 370b8b6ceff588fc8616fc6ce4d3715c1a0d22b6 Mon Sep 17 00:00:00 2001 From: Michael Büchler Date: Mon, 1 Jun 2020 20:51:58 +0200 Subject: superio/ite: Distinguish between chips for PECI readings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some chips can read external temperature sensor values only to TMPIN3. These use EC register 0x55, bit 7 to enable that. This patch adds support for this. It is called "old PECI" by lm_sensors [0]. Other chips can read to any TMPIN[1-3] which is configured in EC register 0x51 like the other temperature sources. This was the only supported method. This patch adds a Kconfig option to indicate this variant. This patch was tested on an Acer Aspire M3800 which has an IT8720F that reads the CPU temperature via PECI. It allows the automatic fan control feature of the Super I/O to work. Overview of support per chip in the coreboot tree, determined from reading the publicly available datasheets or lm_sensors, if noted: Old PECI: * IT8718F * IT8720F * IT8781F, IT8782F, IT8783E/F Normal PECI: * IT8721F (exception: no PECI to TMPIN2) * IT8728F * IT8772E (uses separate code in coreboot, not superio/ite/common) * IT8786E * IT8613E, IT8623E (lm_sensors) [0] Linux kernel 5.4.48, drivers/hwmon/it87.c Signed-off-by: Michael Büchler Change-Id: Iab7115852437d46c9b1269bba61ffcf680fe5a6a Reviewed-on: https://review.coreboot.org/c/coreboot/+/44168 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/superio/ite/it8786e/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/superio/ite/it8786e') diff --git a/src/superio/ite/it8786e/Kconfig b/src/superio/ite/it8786e/Kconfig index 332f6020c6..216d6f5bf8 100644 --- a/src/superio/ite/it8786e/Kconfig +++ b/src/superio/ite/it8786e/Kconfig @@ -7,3 +7,4 @@ config SUPERIO_ITE_IT8786E select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN -- cgit v1.2.3