From 264566c177dac98e67c2a4765fe08c5d8de10753 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 15 Oct 2017 15:06:48 -0600 Subject: Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i3100 southbridge/intel/i3100 superio/intel/i3100 cpu/intel/socket_mPGA479M Mainboards: mainboard/intel/truxton mainboard/intel/mtarvon mainboard/intel/truxton Change-Id: Ic2bbdc8ceb3ba0359c120cf4286b0c5b7dc653bb Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/22031 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/superio/intel/i3100/i3100.h | 66 ----------------------------------------- 1 file changed, 66 deletions(-) delete mode 100644 src/superio/intel/i3100/i3100.h (limited to 'src/superio/intel/i3100/i3100.h') diff --git a/src/superio/intel/i3100/i3100.h b/src/superio/intel/i3100/i3100.h deleted file mode 100644 index fa71c058eb..0000000000 --- a/src/superio/intel/i3100/i3100.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Arastra, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef SUPERIO_INTEL_I3100_H -#define SUPERIO_INTEL_I3100_H - -/* - * Datasheet: - * - Name: Intel 3100 Chipset - * - URL: http://www.intel.com/design/intarch/datashts/313458.htm - * - PDF: http://download.intel.com/design/intarch/datashts/31345803.pdf - * - Revision / Date: 007, October 2008 - * - Order number: 313458-007US - */ - -/* - * The SIW ("Serial I/O and Watchdog Timer") integrated into the i3100 is - * very similar to a Super I/O, both in functionality and config mechanism. - * - * The SIW contains: - * - UART(s) - * - Serial interrupt controller - * - Watchdog timer (WDT) - * - LPC interface - */ - -/* Logical device numbers (LDNs). */ -#define I3100_SP1 0x04 /* Com1 */ -#define I3100_SP2 0x05 /* Com2 */ -#define I3100_WDT 0x06 /* Watchdog timer */ - -/* Registers and bit definitions: */ - -#define I3100_SIW_CONFIGURATION 0x29 - -/* - * SIW_CONFIGURATION[3:2] = UART_CLK predivide - * 00: divide by 1 - * 01: divide by 8 - * 10: divide by 26 - * 11: reserved - */ -#define I3100_UART_CLK_PREDIVIDE_1 0x00 -#define I3100_UART_CLK_PREDIVIDE_8 0x01 -#define I3100_UART_CLK_PREDIVIDE_26 0x02 - -#include -#include - -void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide); -void i3100_enable_serial(pnp_devfn_t dev, u16 iobase); - -#endif /* SUPERIO_INTEL_I3100_H */ -- cgit v1.2.3