From d3043313a91dff3bc2f879ffb3b4bf23a364d711 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sat, 29 Mar 2014 20:28:03 +1100 Subject: superio/fintek/f81865f: Avoid .c includes We should not be #include .c files, instead link early_serial into romstage and provide a prototype. Change-Id: Ia9277169ce1592e1fc72f8849f0982741daec567 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5416 Reviewed-by: Alexandru Gagniuc Tested-by: build bot (Jenkins) --- src/superio/fintek/f81865f/early_serial.c | 48 +++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 src/superio/fintek/f81865f/early_serial.c (limited to 'src/superio/fintek/f81865f/early_serial.c') diff --git a/src/superio/fintek/f81865f/early_serial.c b/src/superio/fintek/f81865f/early_serial.c new file mode 100644 index 0000000000..29b5f9d658 --- /dev/null +++ b/src/superio/fintek/f81865f/early_serial.c @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Pre-RAM driver for the Fintek F81865F/FG Super I/O chip. */ + +#include +#include +#include "f81865f.h" + +static void pnp_enter_conf_state(device_t dev) +{ + u16 port = dev >> 8; + outb(0x87, port); + outb(0x87, port); +} + +static void pnp_exit_conf_state(device_t dev) +{ + u16 port = dev >> 8; + outb(0xaa, port); +} + +void f81865f_enable_serial(device_t dev, u16 iobase) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_conf_state(dev); +} -- cgit v1.2.3