From ab90782e7220d188e916680da21b49a011208f3f Mon Sep 17 00:00:00 2001 From: BryantOu Date: Fri, 17 Apr 2020 02:15:17 -0700 Subject: superio/aspeed/common: Add early configure functions Add LPC read/write functions for access aspeed's memory, also create config data table to config memory and SIO. These functions are used at early stages to configure devices. Signed-off-by: Bryant Ou Change-Id: Ib59c29a042b2c7bf196b8a5bd5218704d8075855 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40483 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/superio/aspeed/common/early_serial.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/superio/aspeed/common/early_serial.c') diff --git a/src/superio/aspeed/common/early_serial.c b/src/superio/aspeed/common/early_serial.c index 086e9ddf1a..4051fd522a 100644 --- a/src/superio/aspeed/common/early_serial.c +++ b/src/superio/aspeed/common/early_serial.c @@ -27,9 +27,6 @@ #include #include "aspeed.h" -#define ASPEED_ENTRY_KEY 0xA5 -#define ASPEED_EXIT_KEY 0xAA - /* Enable configuration: pass entry key '0xA5' into index port dev. */ void pnp_enter_conf_state(pnp_devfn_t dev) { -- cgit v1.2.3