From f655bf7f3e0c608f4b9cae1ee76e2be5477f4df6 Mon Sep 17 00:00:00 2001
From: Greg Watson <jarrah@users.sourceforge.net>
Date: Mon, 9 Jun 2003 21:59:27 +0000
Subject: Moved from freebios

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/superio/NSC/pc97307/superio.c | 47 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 src/superio/NSC/pc97307/superio.c

(limited to 'src/superio/NSC')

diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c
new file mode 100644
index 0000000000..0a04806a8b
--- /dev/null
+++ b/src/superio/NSC/pc97307/superio.c
@@ -0,0 +1,47 @@
+/* $Id$ */
+/* Copyright 2000  AG Electronics Ltd. */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <ppc.h>
+#include <ppcreg.h>
+#include <types.h>
+#include <pci.h>
+#include <arch/io.h>
+
+#ifndef PNP_INDEX_REG
+#define PNP_INDEX_REG	0x15C
+#endif
+#ifndef PNP_DATA_REG
+#define PNP_DATA_REG	0x15D
+#endif
+#ifndef SIO_COM1
+#define SIO_COM1_BASE	0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE	0x2F8
+#endif
+
+void pnp_output(char address, char data)
+{
+    outb(address, PNP_INDEX_REG);
+    outb(data, PNP_DATA_REG);
+}
+
+void sio_enable(void)
+{
+    /* Enable Super IO Chip */
+    pnp_output(0x07, 6); /* LD 6 = UART1 */
+    pnp_output(0x30, 0); /* Dectivate */
+    pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
+    pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
+    pnp_output(0x30, 1); /* Activate */
+}
+
+struct superio_control superio_NSC_pc97307_control = {
+	pre_pci_init:   (void *)0,
+	init:           (void *)0,
+	finishup:       (void *)0,
+	defaultport:    SIO_COM1_BASE,
+	name:           "NSC 87307"
+};
+
-- 
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