From c01a505282526a7038463e937cbec83f704a6a89 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 30 Jan 2019 09:39:23 +0200 Subject: sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Datasheets describe the used command as 'I2C Read' but adding the word 'eeprom' in between should avoid further confusion with other block commands. Followups will add a symmetrical pair of commands i2c_block_read() and i2c_block_write() that operate via I2C_EN bit and have a 32 byte size restriction on block transfers. For some hardware revision these block commands are available, while 'I2C Read' was not. Change-Id: I4494ab2985afc7f737ddacc8d706a5d5395e35cf Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/31151 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: HAOUAS Elyes Reviewed-by: Arthur Heymans --- src/southbridge/intel/common/smbus.c | 13 ++++++++++++- src/southbridge/intel/common/smbus.h | 2 +- src/southbridge/intel/i82801gx/early_smbus.c | 4 ++-- src/southbridge/intel/i82801gx/i82801gx.h | 2 +- src/southbridge/intel/i82801jx/early_smbus.c | 4 ++-- src/southbridge/intel/i82801jx/i82801jx.h | 2 +- 6 files changed, 19 insertions(+), 8 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index fd8b6aa8dd..a842a61222 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -363,11 +363,22 @@ int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, } /* Only since ICH5 */ -int do_i2c_block_read(unsigned int smbus_base, u8 device, +static int has_i2c_read_command(void) +{ + if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82371EB) || + IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801DX)) + return 0; + return 1; +} + +int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, unsigned int offset, const unsigned int bytes, u8 *buf) { int ret; + if (!has_i2c_read_command()) + return SMBUS_ERROR; + /* Set up for a i2c block data read. * * FIXME: Address parameter changes to XMIT_READ(device) with diff --git a/src/southbridge/intel/common/smbus.h b/src/southbridge/intel/common/smbus.h index be1aa76c21..ded31d0ae2 100644 --- a/src/southbridge/intel/common/smbus.h +++ b/src/southbridge/intel/common/smbus.h @@ -41,6 +41,6 @@ int do_smbus_block_read(unsigned int smbus_base, u8 device, int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, unsigned int bytes, const u8 *buf); /* Only since ICH5 */ -int do_i2c_block_read(unsigned int smbus_base, u8 device, +int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, unsigned int offset, unsigned int bytes, u8 *buf); #endif diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index 698458b86a..9dddcec362 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -54,9 +54,9 @@ int smbus_read_byte(unsigned int device, unsigned int address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -int i2c_block_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) +int i2c_eeprom_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) { - return do_i2c_block_read(SMBUS_IO_BASE, device, offset, bytes, buf); + return do_i2c_eeprom_read(SMBUS_IO_BASE, device, offset, bytes, buf); } int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 66d47ae157..12935c24f2 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -45,7 +45,7 @@ void i82801gx_enable(struct device *dev); #else void enable_smbus(void); int smbus_read_byte(unsigned int device, unsigned int address); -int i2c_block_read(unsigned int device, unsigned int cmd, unsigned int bytes, +int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes, u8 *buf); int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf); int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index bd689556e9..8c870454fe 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -51,9 +51,9 @@ int smbus_read_byte(unsigned device, unsigned address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -int i2c_block_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) +int i2c_eeprom_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) { - return do_i2c_block_read(SMBUS_IO_BASE, device, offset, bytes, buf); + return do_i2c_eeprom_read(SMBUS_IO_BASE, device, offset, bytes, buf); } int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h index ad3b38177a..00148480a1 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.h +++ b/src/southbridge/intel/i82801jx/i82801jx.h @@ -233,7 +233,7 @@ static inline int lpc_is_mobile(const u16 devid) #if defined(__PRE_RAM__) void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); -int i2c_block_read(unsigned int device, unsigned int cmd, unsigned int bytes, +int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes, u8 *buf); int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf); int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, -- cgit v1.2.3