From b1c8f81b25cd77056f653b9a7d5f24e65e40e655 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Mon, 13 Aug 2012 09:41:54 -0700 Subject: SMI: Change order of SMI_EN and PM1_EN init This appears to fix an infrequent resume hang on Ivybridge. Tested on 2 devices with 15k suspend/resume cycles each Change-Id: I53618bc7966824413f1720a2be3cbd2550e29473 Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1704 Reviewed-by: Marc Jones Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/smi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/bd82x6x/smi.c b/src/southbridge/intel/bd82x6x/smi.c index bd4d32c135..bd88df2066 100644 --- a/src/southbridge/intel/bd82x6x/smi.c +++ b/src/southbridge/intel/bd82x6x/smi.c @@ -269,6 +269,11 @@ static void smm_relocate(void) gpe0_en &= ~PME_B0_EN; outl(gpe0_en, pmbase + GPE0_EN); + pm1_en = 0; + pm1_en |= PWRBTN_EN; + pm1_en |= GBL_EN; + outw(pm1_en, pmbase + PM1_EN); + /* Enable SMI generation: * - on TCO events * - on APMC writes (io 0xb2) @@ -301,11 +306,6 @@ static void smm_relocate(void) outl(smi_en, pmbase + SMI_EN); - pm1_en = 0; - pm1_en |= PWRBTN_EN; - pm1_en |= GBL_EN; - outw(pm1_en, pmbase + PM1_EN); - /** * There are several methods of raising a controlled SMI# via * software, among them: -- cgit v1.2.3