From a144e4d6fa93b9ba129b3aa8991cc5fb2ec3c8a6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 23 May 2018 20:00:16 +0300 Subject: device: Use pcidev_path_behind() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iac16f9412d0e6aac908d873c61a4de3935e5318a Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26518 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/southbridge/amd/amd8111/amd8111.c | 4 ++-- src/southbridge/amd/sb700/sb700.c | 2 +- src/southbridge/amd/sb800/sb800.c | 2 +- src/southbridge/broadcom/bcm5785/bcm5785.c | 7 ++++--- src/southbridge/nvidia/ck804/ck804.c | 2 +- src/southbridge/nvidia/mcp55/mcp55.c | 8 ++++---- 6 files changed, 13 insertions(+), 12 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index 041a2994e1..fae22ada3b 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -30,7 +30,7 @@ void amd8111_enable(struct device *dev) { unsigned devfn; devfn = bus_dev->path.pci.devfn + (1 << 3); - lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn); + lpc_dev = pcidev_path_behind(bus_dev->bus, devfn); index = ((dev->path.pci.devfn & ~7) >> 3) + 8; if (dev->path.pci.devfn == 2) { /* EHCI */ index = 16; @@ -38,7 +38,7 @@ void amd8111_enable(struct device *dev) } else { unsigned devfn; devfn = (dev->path.pci.devfn) & ~7; - lpc_dev = dev_find_slot(dev->bus->secondary, devfn); + lpc_dev = pcidev_path_behind(dev->bus, devfn); index = dev->path.pci.devfn & 7; } if ((!lpc_dev) || (index >= 17)) { diff --git a/src/southbridge/amd/sb700/sb700.c b/src/southbridge/amd/sb700/sb700.c index 1d63f5c642..b7ff58d90c 100644 --- a/src/southbridge/amd/sb700/sb700.c +++ b/src/southbridge/amd/sb700/sb700.c @@ -27,7 +27,7 @@ static struct device *find_sm_dev(struct device *dev, u32 devfn) { struct device *sm_dev; - sm_dev = dev_find_slot(dev->bus->secondary, devfn); + sm_dev = pcidev_path_behind(dev->bus, devfn); if (!sm_dev) return sm_dev; diff --git a/src/southbridge/amd/sb800/sb800.c b/src/southbridge/amd/sb800/sb800.c index 8bf7937a14..bd4dc68ca2 100644 --- a/src/southbridge/amd/sb800/sb800.c +++ b/src/southbridge/amd/sb800/sb800.c @@ -28,7 +28,7 @@ static struct device *find_sm_dev(struct device *dev, u32 devfn) { struct device *sm_dev; - sm_dev = dev_find_slot(dev->bus->secondary, devfn); + sm_dev = pcidev_path_behind(dev->bus, devfn); if (!sm_dev) return sm_dev; diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c index 16f45bb671..53ee8d4698 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785.c @@ -32,14 +32,15 @@ void bcm5785_enable(struct device *dev) { unsigned devfn; devfn = bus_dev->path.pci.devfn + (1 << 3); - sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn); + sb_pci_main_dev = pcidev_path_behind(bus_dev->bus, devfn); // index = ((dev->path.pci.devfn & ~7) >> 3) + 8; } else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && (bus_dev->device == 0x0104)) // device under PCI Bridge (under PCI-X) { unsigned devfn; devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3); - sb_pci_main_dev = dev_find_slot(bus_dev->bus->dev->bus->secondary, devfn); + sb_pci_main_dev = pcidev_path_behind(bus_dev->bus->dev->bus, + devfn); // index = ((dev->path.pci.devfn & ~7) >> 3) + 8; } else { // same bus @@ -51,7 +52,7 @@ void bcm5785_enable(struct device *dev) else if (dev->device == 0x0223) // USB { devfn -= (1<<3); } } - sb_pci_main_dev = dev_find_slot(dev->bus->secondary, devfn); + sb_pci_main_dev = pcidev_path_behind(dev->bus, devfn); // index = dev->path.pci.devfn & 7; } if (!sb_pci_main_dev) { diff --git a/src/southbridge/nvidia/ck804/ck804.c b/src/southbridge/nvidia/ck804/ck804.c index a60331c5a1..615872de5c 100644 --- a/src/southbridge/nvidia/ck804/ck804.c +++ b/src/southbridge/nvidia/ck804/ck804.c @@ -27,7 +27,7 @@ static struct device *find_lpc_dev(struct device *dev, unsigned devfn) { struct device *lpc_dev; - lpc_dev = dev_find_slot(dev->bus->secondary, devfn); + lpc_dev = pcidev_path_behind(dev->bus, devfn); if (!lpc_dev) return lpc_dev; diff --git a/src/southbridge/nvidia/mcp55/mcp55.c b/src/southbridge/nvidia/mcp55/mcp55.c index 551da8937c..8f0ec8fe77 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.c +++ b/src/southbridge/nvidia/mcp55/mcp55.c @@ -30,7 +30,7 @@ static struct device *find_lpc_dev(struct device *dev, unsigned devfn) { struct device *lpc_dev; - lpc_dev = dev_find_slot(dev->bus->secondary, devfn); + lpc_dev = pcidev_path_behind(dev->bus, devfn); if (!lpc_dev) return lpc_dev; @@ -158,7 +158,7 @@ void mcp55_enable(struct device *dev) return; if (index2 != 0) { - sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1); + sm_dev = pcidev_path_behind(dev->bus, devfn + 1); if (!sm_dev) return; if (sm_dev) { @@ -187,7 +187,7 @@ void mcp55_enable(struct device *dev) } if (index == 16) { - sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1); + sm_dev = pcidev_path_behind(dev->bus, devfn + 1); if (!sm_dev) return; @@ -211,7 +211,7 @@ void mcp55_enable(struct device *dev) /* NIC1 is the final, we need update final reg to 0xe8. */ if (index == 9) { - sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1); + sm_dev = pcidev_path_behind(dev->bus, devfn + 1); if (!sm_dev) return; reg_old = pci_read_config32(sm_dev, 0xe8); -- cgit v1.2.3