From 88e71e88597d939972267cdb00aca3cc61f5e171 Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <stepan@coresystems.de>
Date: Sat, 2 May 2009 12:42:30 +0000
Subject: Run dos2unix on all files:

find . -type f| grep -v svn | xargs dos2unix

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/southbridge/intel/i82801ca/i82801ca_pci.c | 60 +++++++++++++--------------
 1 file changed, 30 insertions(+), 30 deletions(-)

(limited to 'src/southbridge')

diff --git a/src/southbridge/intel/i82801ca/i82801ca_pci.c b/src/southbridge/intel/i82801ca/i82801ca_pci.c
index 2508419d1b..5f7b89700e 100644
--- a/src/southbridge/intel/i82801ca/i82801ca_pci.c
+++ b/src/southbridge/intel/i82801ca/i82801ca_pci.c
@@ -1,30 +1,30 @@
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include "i82801ca.h"
-
-static void pci_init(struct device *dev)
-{
-	// NOTE: the original (v1) 'CA code set these in the bridge register (0x3E-3F)
-	/* Enable pci error detecting */
-	uint32_t dword = pci_read_config32(dev, PCI_COMMAND);
-	dword |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
-	pci_write_config32(dev, PCI_COMMAND, dword);
-}
-
-static struct device_operations pci_ops  = {
-	.read_resources   = pci_bus_read_resources,
-	.set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_bus_enable_resources,
-	.init             = pci_init,
-	.scan_bus         = pci_scan_bridge,
-};
-
-static const struct pci_driver pci_driver __pci_driver = {
-	.ops    = &pci_ops,
-	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = PCI_DEVICE_ID_INTEL_82801CA_PCI,
-};
-
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include "i82801ca.h"
+
+static void pci_init(struct device *dev)
+{
+	// NOTE: the original (v1) 'CA code set these in the bridge register (0x3E-3F)
+	/* Enable pci error detecting */
+	uint32_t dword = pci_read_config32(dev, PCI_COMMAND);
+	dword |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
+	pci_write_config32(dev, PCI_COMMAND, dword);
+}
+
+static struct device_operations pci_ops  = {
+	.read_resources   = pci_bus_read_resources,
+	.set_resources    = pci_dev_set_resources,
+	.enable_resources = pci_bus_enable_resources,
+	.init             = pci_init,
+	.scan_bus         = pci_scan_bridge,
+};
+
+static const struct pci_driver pci_driver __pci_driver = {
+	.ops    = &pci_ops,
+	.vendor = PCI_VENDOR_ID_INTEL,
+	.device = PCI_DEVICE_ID_INTEL_82801CA_PCI,
+};
+
-- 
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