From 81d3d7d00173eafff0ef134bdf1ee5e632f3868a Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 15 Jun 2013 12:30:13 +0300 Subject: lynxpoint: Fix early EHCI BAR programming MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit LynxPoint LP has only EHCI controller #1. Change EHCI #2 to different BAR from EHCI #1. Even if the ECHI controllers are not to be addressed, it is bad idea to set two different devices to claim the same PCI memory cycles. Change-Id: I95c59fb9d5f09afd152872e9bc0418dc67e4aeb2 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/3472 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/southbridge/intel/lynxpoint/early_usb.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index ebd5c2c50a..d71467e066 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -34,23 +34,19 @@ * The BAR will be re-assigned during device * enumeration so these are only temporary. */ -void enable_usb_bar(void) +static void enable_usb_bar_on_device(device_t dev, u32 bar) { - device_t usb0 = PCH_EHCI1_DEV; - device_t usb1 = PCH_EHCI2_DEV; u32 cmd; - - /* USB Controller 1 */ - pci_write_config32(usb0, PCI_BASE_ADDRESS_0, - PCH_EHCI1_TEMP_BAR0); - cmd = pci_read_config32(usb0, PCI_COMMAND); + pci_write_config32(dev, PCI_BASE_ADDRESS_0, bar); + cmd = pci_read_config32(dev, PCI_COMMAND); cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config32(usb0, PCI_COMMAND, cmd); + pci_write_config32(dev, PCI_COMMAND, cmd); +} - /* USB Controller 1 */ - pci_write_config32(usb1, PCI_BASE_ADDRESS_0, - PCH_EHCI1_TEMP_BAR0); - cmd = pci_read_config32(usb1, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config32(usb1, PCI_COMMAND, cmd); +void enable_usb_bar(void) +{ + enable_usb_bar_on_device(PCH_EHCI1_DEV, PCH_EHCI1_TEMP_BAR0); +#if !CONFIG_INTEL_LYNXPOINT_LP + enable_usb_bar_on_device(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0); +#endif } -- cgit v1.2.3