From 6f66f414a0907f79abf492cd9eca839c0849c7f6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 1 Dec 2016 22:08:18 +0200 Subject: PCI ops: MMCONF_SUPPORT_DEFAULT is required MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Doing PCI config operations via MMIO window by default is a requirement, if supported by the platform. This means chipset or CPU code must enable MMCONF operations early in bootblock already, or before platform-specific romstage entry. Platforms are allowed to have NO_MMCONF_SUPPORT only in the case it is actually not implemented in the silicon. Change-Id: Id4d9029dec2fe195f09373320de800fcdf88c15d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17693 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/intel/i82801gx/i82801gx.c | 4 ---- src/southbridge/intel/i82801ix/i82801ix.c | 4 ---- 2 files changed, 8 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c index 6d97088106..aab674b6a0 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.c +++ b/src/southbridge/intel/i82801gx/i82801gx.c @@ -20,10 +20,6 @@ #include "i82801gx.h" #include "sata.h" -#if !CONFIG_MMCONF_SUPPORT_DEFAULT -#error ICH7 requires CONFIG_MMCONF_SUPPORT_DEFAULT -#endif - void i82801gx_enable(device_t dev) { u32 reg32; diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c index f02429a3bd..0f3a08c9cf 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.c +++ b/src/southbridge/intel/i82801ix/i82801ix.c @@ -23,10 +23,6 @@ #include #include "i82801ix.h" -#if !CONFIG_MMCONF_SUPPORT_DEFAULT -#error ICH9 requires CONFIG_MMCONF_SUPPORT_DEFAULT -#endif - typedef struct southbridge_intel_i82801ix_config config_t; static void i82801ix_enable_device(device_t dev) -- cgit v1.2.3