From 61aee5f4b1d596a0cb007e666df13094abed6d10 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 10 Apr 2011 04:15:23 +0000 Subject: In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__. http://www.coreboot.org/pipermail/coreboot/2007-September/024665.html It's about time we follow this advice. Also move some manually set __PRE_RAM__ defines (ap_romstage.c) to the Makefile and drop unused CPP define Signed-off-by: Stefan Reinauer Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cs5535/cs5535.h | 2 +- src/southbridge/amd/cs5536/cs5536.h | 2 +- src/southbridge/intel/i82371eb/i82371eb.h | 2 +- src/southbridge/intel/i82801gx/i82801gx.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/cs5535/cs5535.h b/src/southbridge/amd/cs5535/cs5535.h index 590811c604..0db7c17551 100644 --- a/src/southbridge/amd/cs5535/cs5535.h +++ b/src/southbridge/amd/cs5535/cs5535.h @@ -115,7 +115,7 @@ /* Flash Memory Mask values */ #define FLASH_MEM_4K 0xFFFFF000 -#if !defined(ASSEMBLY) && !defined(__ROMCC__) +#if !defined(__ASSEMBLER__) && !defined(__ROMCC__) #if defined(__PRE_RAM__) void cs5535_disable_internal_uart(void); #else diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index a80c0680c5..8fa24daf38 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -442,7 +442,7 @@ #define FLASH_IO_128B 0x0000FF80 #define FLASH_IO_256B 0x0000FF00 -#if !defined(ASSEMBLY) && !defined(__ROMCC__) +#if !defined(__ASSEMBLER__) && !defined(__ROMCC__) #if defined(__PRE_RAM__) void cs5536_setup_onchipuart(int uart); void cs5536_disable_internal_uart(void); diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 709b8327a8..3b461b5365 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -21,7 +21,7 @@ #ifndef SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H #define SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H -#if !defined(ASSEMBLY) +#if !defined(__ASSEMBLER__) #if !defined(__PRE_RAM__) #if !defined(__ACPI__) /* dsdt include */ diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 208ff6d4af..63c583dea5 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -38,7 +38,7 @@ #ifndef __ACPI__ #define DEBUG_PERIODIC_SMIS 0 -#if !defined(ASSEMBLY) && !defined(__ROMCC__) +#if !defined(__ASSEMBLER__) && !defined(__ROMCC__) #if !defined(__PRE_RAM__) #include "chip.h" extern void i82801gx_enable(device_t dev); -- cgit v1.2.3