From 564c2191ab5d2c57ce7d3fda9a7596ef3e39b975 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 3 Jun 2018 06:12:03 +0300 Subject: sb/amd/rs780: Fix invalid function declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Provide empty stub implementations for set_pcie_reset() and set_pcie_dereset(), many boards do not provide a proper one. Change-Id: Ia6811442905ef1776fa5a8e3f5d4433e86e42f88 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26776 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/southbridge/amd/rs780/cmn.c | 11 ++++++++--- src/southbridge/amd/rs780/gfx.c | 3 --- src/southbridge/amd/rs780/rs780.h | 2 ++ 3 files changed, 10 insertions(+), 6 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index c39c6e9968..b849e1efa7 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -256,9 +256,6 @@ u8 PcieTrainPort(struct device *nb_dev, struct device *dev, u32 port) u32 lc_state, reg, current_link_width, lane_mask; int8_t current, res = 0; u32 gfx_gpp_sb_sel; - void set_pcie_dereset(void); - void set_pcie_reset(void); - switch (port) { case 2 ... 3: gfx_gpp_sb_sel = PCIE_CORE_INDEX_GFX; @@ -397,3 +394,11 @@ int is_family10h(void) { return cpuidFamily() == 0x10; } + +__weak void set_pcie_reset(void) +{ +} + +__weak void set_pcie_dereset(void) +{ +} diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c index 3152a14eb1..cfcddb29f3 100644 --- a/src/southbridge/amd/rs780/gfx.c +++ b/src/southbridge/amd/rs780/gfx.c @@ -36,9 +36,6 @@ #include #include "rs780.h" -void set_pcie_reset(void); -void set_pcie_dereset(void); - /* Trust the original resource allocation. Don't do it again. */ #undef DONT_TRUST_RESOURCE_ALLOCATION //#define DONT_TRUST_RESOURCE_ALLOCATION diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h index a8bbbe2231..ce46d96760 100644 --- a/src/southbridge/amd/rs780/rs780.h +++ b/src/southbridge/amd/rs780/rs780.h @@ -223,5 +223,7 @@ void enable_rs780_dev8(void); void rs780_early_setup(void); void rs780_htinit(void); int is_dev3_present(void); +void set_pcie_reset(void); +void set_pcie_dereset(void); #endif /* __RS780_H__ */ -- cgit v1.2.3