From 5493b4543d80e6cabe4ce60341f0a02f1711da66 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sun, 23 Dec 2018 18:40:15 +0100
Subject: sb/intel/bd82x6x: Fix typo in GPIO Level

Change-Id: I5e24120ca788ace8b61f8a7aee177c7247d30de2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
---
 src/southbridge/intel/bd82x6x/acpi/pch.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/southbridge')

diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl
index d3aa7a4406..72e284d08f 100644
--- a/src/southbridge/intel/bd82x6x/acpi/pch.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -87,7 +87,7 @@ Scope(\)
 		GIO2, 8,
 		GIO3, 8,
 		Offset(0x0c),	// GPIO Level
-		GL00, 1,
+		GP00, 1,
 		GP01, 1,
 		GP02, 1,
 		GP03, 1,
-- 
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