From 39bde7cacf104a27a547aaf1c599962f31447ff6 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 21 Oct 2019 20:02:14 +0200 Subject: sb/intel/i82801gx: Set FERR# Mux Enable only on mobile platforms This follows the ICH7 datasheets. Change-Id: Ic8f6db8556662b03efead8c1b9e3074ffe24cd8b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36201 Reviewed-by: Nico Huber Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801gx/early_cir.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/i82801gx/early_cir.c b/src/southbridge/intel/i82801gx/early_cir.c index 4f08a43b91..7543a777d5 100644 --- a/src/southbridge/intel/i82801gx/early_cir.c +++ b/src/southbridge/intel/i82801gx/early_cir.c @@ -29,9 +29,6 @@ void ich7_setup_cir(void) RCBA32(0x0214) = 0x10030549; RCBA32(0x0218) = 0x00020504; RCBA8(0x0220) = 0xc5; - reg32 = RCBA32(GCS); - reg32 |= (1 << 6); - RCBA32(GCS) = reg32; RCBA32_AND_OR(0x3430, ~(3 << 0), 1 << 0); RCBA16(0x0200) = 0x2008; RCBA8(0x2027) = 0x0d; @@ -51,5 +48,9 @@ void ich7_setup_cir(void) reg32 |= (5 << 16); RCBA32(0x2034) = reg32; } + /* FERR# MUX Enable (FME) */ + reg32 = RCBA32(GCS); + reg32 |= (1 << 6); + RCBA32(GCS) = reg32; } } -- cgit v1.2.3