From 2d35cf8689998b9dc0626083c3a3d867f82a35e0 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 29 Oct 2020 19:28:44 +0100 Subject: sb/intel/lynxpoint: Use common code to generate HPET table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There's no need to reinvent the wheel. Change-Id: If6b90c9a7a00af0322c6dd15d2c4ecf2c513d0cc Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46977 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/southbridge/intel/lynxpoint/Kconfig | 4 ++++ src/southbridge/intel/lynxpoint/acpi.c | 31 ------------------------------- src/southbridge/intel/lynxpoint/lpc.c | 9 +-------- src/southbridge/intel/lynxpoint/pch.h | 1 - 4 files changed, 5 insertions(+), 40 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 5abb286222..7ba86b8fcc 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -51,6 +51,10 @@ config SERIRQ_CONTINUOUS_MODE If you set this option to y, the serial IRQ machine will be operated in continuous mode. +config HPET_MIN_TICKS + hex + default 0x80 + config FINALIZE_USB_ROUTE_XHCI bool "Route all ports to XHCI controller in finalize step" default y diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c index ce1b109342..e699c5d8e2 100644 --- a/src/southbridge/intel/lynxpoint/acpi.c +++ b/src/southbridge/intel/lynxpoint/acpi.c @@ -9,37 +9,6 @@ #include "pch.h" #include "nvs.h" -void acpi_create_intel_hpet(acpi_hpet_t * hpet) -{ - acpi_header_t *header = &(hpet->header); - acpi_addr_t *addr = &(hpet->addr); - - memset((void *)hpet, 0, sizeof(acpi_hpet_t)); - - /* fill out header fields */ - memcpy(header->signature, "HPET", 4); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - - header->length = sizeof(acpi_hpet_t); - header->revision = get_acpi_table_revision(HPET); - - /* fill out HPET address */ - addr->space_id = ACPI_ADDRESS_SPACE_MEMORY; - addr->bit_width = 64; - addr->bit_offset = 0; - addr->addrl = (unsigned long long)HPET_ADDR & 0xffffffff; - addr->addrh = (unsigned long long)HPET_ADDR >> 32; - - hpet->id = 0x8086a201; /* Intel */ - hpet->number = 0x00; - hpet->min_tick = 0x0080; - - header->checksum = - acpi_checksum((void *)hpet, sizeof(acpi_hpet_t)); -} - static void acpi_create_serialio_ssdt_entry(int id, struct global_nvs *gnvs) { char sio_name[5] = {}; diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 29cd53f703..12e262502e 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -737,7 +737,6 @@ static unsigned long southbridge_write_acpi_tables(const struct device *device, struct acpi_rsdp *rsdp) { unsigned long current; - acpi_hpet_t *hpet; acpi_header_t *ssdt; current = start; @@ -748,13 +747,7 @@ static unsigned long southbridge_write_acpi_tables(const struct device *device, /* * We explicitly add these tables later on: */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *)current; - current += sizeof(acpi_hpet_t); - current = acpi_align_current(current); - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); + current = acpi_write_hpet(device, current, rsdp); current = acpi_align_current(current); diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 1ecad62796..50e0b142af 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -120,7 +120,6 @@ void disable_gpe(u32 mask); void pch_enable(struct device *dev); void pch_disable_devfn(struct device *dev); void pch_log_state(void); -void acpi_create_intel_hpet(acpi_hpet_t * hpet); void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void enable_usb_bar(void); -- cgit v1.2.3