From 26e0f4cefc9423fafc7e105796df93026026c48c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 19 Dec 2020 19:10:45 +0200
Subject: sb,soc/intel: Convert some CONFIG(CHROMEOS) preprocessor
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Change-Id: I964f4340caa20124a15e52c055d2f27ba5113687
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48783
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/bd82x6x/me_common.c | 11 ++++-------
 src/southbridge/intel/lynxpoint/me_9.x.c  |  8 ++------
 2 files changed, 6 insertions(+), 13 deletions(-)

(limited to 'src/southbridge')

diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c
index ae157d36c3..422c091001 100644
--- a/src/southbridge/intel/bd82x6x/me_common.c
+++ b/src/southbridge/intel/bd82x6x/me_common.c
@@ -15,6 +15,8 @@
 #include "me.h"
 #include "pch.h"
 
+#include <vendorcode/google/chromeos/chromeos.h>
+
 /* Path that the BIOS should take based on ME state */
 static const char *const me_bios_path_values[] = {
 	[ME_NORMAL_BIOS_PATH]		= "Normal",
@@ -362,10 +364,6 @@ int intel_mei_setup(struct device *dev)
 	return 0;
 }
 
-#if CONFIG(CHROMEOS)
-#include <vendorcode/google/chromeos/chromeos.h>
-#endif
-
 /* Read the Extend register hash of ME firmware */
 int intel_me_extend_valid(struct device *dev)
 {
@@ -405,10 +403,9 @@ int intel_me_extend_valid(struct device *dev)
 	}
 	printk(BIOS_DEBUG, "\n");
 
-#if CONFIG(CHROMEOS)
 	/* Save hash in NVS for the OS to verify */
-	chromeos_set_me_hash(extend, count);
-#endif
+	if (CONFIG(CHROMEOS))
+		chromeos_set_me_hash(extend, count);
 
 	return 0;
 }
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 9910658b82..69192e6ccb 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -25,10 +25,7 @@
 #include "me.h"
 #include "pch.h"
 
-#if CONFIG(CHROMEOS)
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <vendorcode/google/chromeos/gnvs.h>
-#endif
 
 /* Path that the BIOS should take based on ME state */
 static const char *const me_bios_path_values[] __unused = {
@@ -755,10 +752,9 @@ static int intel_me_extend_valid(struct device *dev)
 	}
 	printk(BIOS_DEBUG, "\n");
 
-#if CONFIG(CHROMEOS)
 	/* Save hash in NVS for the OS to verify */
-	chromeos_set_me_hash(extend, count);
-#endif
+	if (CONFIG(CHROMEOS))
+		chromeos_set_me_hash(extend, count);
 
 	return 0;
 }
-- 
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