From 22935e1f43c2b0873dfa9b5f176df5616ce7a041 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Mon, 9 Jul 2012 09:58:35 -0700 Subject: CPU: Set flex ratio to nominal TDP ratio in bootblock CPUs with configurable TDP will run the TSC at the max non-turbo ratio for the maximum TDP value, which can cause issues if another TDP is desired. To deal with this we set the flex ratio to the nominal TDP ratio early in the boot and then configure the Soft Reset Data registers so the PCH can tell the CPU what frequency to run at after a reset. This is done very early in the bootblock because it is necessary to reset the system after setting a flex ratio. The end result is that the TSC will now increment at the max non-turbo frequency for the nominal TDP. On some system with 1.8GHz CPU ensure that the kernel detects the CPU speed as ~1800mhz rather than ~2300mhz: > dmesg | grep "MHz processor" [ 0.004000] Detected 1795.801 MHz processor. Change-Id: I8436dced9199003b6423186a2b041e3f7b84ab8c Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1329 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/southbridge/intel/bd82x6x/pch.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 7b646f3f5d..c9cc15edf9 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -365,6 +365,8 @@ int smbus_read_byte(unsigned device, unsigned address); #define D25IR 0x3150 /* 16bit */ #define D22IR 0x315c /* 16bit */ #define OIC 0x31fe /* 16bit */ +#define SOFT_RESET_CTRL 0x38f4 +#define SOFT_RESET_DATA 0x38f8 #define DIR_ROUTE(x,a,b,c,d) \ RCBA32(x) = (((d) << DIR_IDR) | ((c) << DIR_ICR) | \ -- cgit v1.2.3