From 1bad4ce421188748d1c3dd6bafe3863cbb21dd24 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 3 Jun 2018 06:10:23 +0300 Subject: sb/amd/sr5650: Fix invalid function declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I5034debc2296352e698898c20910a2d76071e30a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26775 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/southbridge/amd/sr5650/cmn.h | 4 ++++ src/southbridge/amd/sr5650/sr5650.c | 3 --- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h index 0c0fd29ca7..e44d1e89c0 100644 --- a/src/southbridge/amd/sr5650/cmn.h +++ b/src/southbridge/amd/sr5650/cmn.h @@ -146,4 +146,8 @@ static inline void set_pcie_enable_bits(device_t dev, u32 reg_pos, u32 mask, u32 nb_write_index(dev, NBPCIE_INDEX, reg_pos, reg); } } + +void set_pcie_reset(void); +void set_pcie_dereset(void); + #endif /* __SR5650_CMN_H__ */ diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c index ec78467d0e..1962ea3277 100644 --- a/src/southbridge/amd/sr5650/sr5650.c +++ b/src/southbridge/amd/sr5650/sr5650.c @@ -32,9 +32,6 @@ /* * extern function declaration */ -extern void set_pcie_dereset(void); -extern void set_pcie_reset(void); - struct resource * sr5650_retrieve_cpu_mmio_resource() { struct device *domain; struct resource *res; -- cgit v1.2.3