From 1455437c9e010bcc617c5927e18cf1cb3b02c82f Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 12 Nov 2015 14:02:42 -0700 Subject: x86: Add Kconfig to disable early bootblock postcodes The Intel cave creek chipset needs to have port 80 routing configured before any post codes can be sent to port 80h. Sending post codes out before the routing is done will hang the system. This patch allows us to disable the first couple of post codes that go out before the routing can be configured. The Kconfig symbol is selected by the cave creek chipset (fsp_i89xx). Change-Id: I9bf41669ec32744f87a1ed2de011d31c72ea38da Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/12422 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: York Yang --- src/southbridge/intel/fsp_i89xx/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig index d1426d670b..9d195d2647 100644 --- a/src/southbridge/intel/fsp_i89xx/Kconfig +++ b/src/southbridge/intel/fsp_i89xx/Kconfig @@ -34,6 +34,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SPI_FLASH select COMMON_FADT select HAVE_INTEL_FIRMWARE + select NO_EARLY_BOOTBLOCK_POSTCODES config EHCI_BAR hex -- cgit v1.2.3