From 09f767dc2757c538ab3fdf2fb76f91131313e062 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 4 Aug 2021 19:33:51 +0200 Subject: sb/amd/pi/hudson/soc/gpio: add SOC_GPIO_TOTAL_PINS definition EGPIO132 is the last documented GPIO on the GPIO controller in the NDA version of the BKDG for AMD Family 16h Models 30h-3Fh Processors (#52740 Rev 3.06) which is the only SoC using this code, so define SOC_GPIO_TOTAL_PINS as 133, since the internal GPIO numbers are 0-indexed. This definition will be needed the subsequent patch that'll add the remote GPIO support to the common AMD GPIO code to make sure that the compiler can optimize out the code path needed to support the remote GPIO access which isn't available on this platform anyway. Signed-off-by: Felix Held Change-Id: I877d462c5e753c9bbb3461dbb10cde2adc2cb12c Reviewed-on: https://review.coreboot.org/c/coreboot/+/56809 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/southbridge/amd/pi/hudson/soc/gpio.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/pi/hudson/soc/gpio.h b/src/southbridge/amd/pi/hudson/soc/gpio.h index 10a47cb101..6069ee018d 100644 --- a/src/southbridge/amd/pi/hudson/soc/gpio.h +++ b/src/southbridge/amd/pi/hudson/soc/gpio.h @@ -6,4 +6,6 @@ /* must provide gpio_t. */ #include +#define SOC_GPIO_TOTAL_PINS 133 + #endif /* SOC_GPIO_H */ -- cgit v1.2.3