From 8520e01af792bca95aaed332bc0cbc7116948706 Mon Sep 17 00:00:00 2001 From: Tobias Diedrich Date: Wed, 17 Nov 2010 11:30:50 +0000 Subject: Linux also needs the MMCONF area to be reserved either in E820 or as an ACPI motherboard resource or it will not enable MMCONFIG and the extended pcie configuration area will be unaccessible: This patch adds the IORESOURCE_RESERVE flag to the APIC and MMCONF resource flags to do this. I also added a new resource for the mapped bios rom area just below 4GB. I'm not sure if the choice for the index parameter of new_resource() is correct though. Note that the bios rom decode is enabled in src/southbridge/via/vt8237r/vt8237r_early_smbus.c for the whole 4MB area (even though the comment says 1MB). Ruik: I extended the flash range to 16MB (This is what VT8237S can decode) Remove the MMCONFIG region reserve in the mainboard file (this patch makes it obsolete) Signed-off-by: Tobias Diedrich Acked-by: Rudolf Marek git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/via/k8t890/k8t890_traf_ctrl.c | 4 ++-- src/southbridge/via/vt8237r/vt8237r_lpc.c | 16 ++++++++++++---- 2 files changed, 14 insertions(+), 6 deletions(-) (limited to 'src/southbridge/via') diff --git a/src/southbridge/via/k8t890/k8t890_traf_ctrl.c b/src/southbridge/via/k8t890/k8t890_traf_ctrl.c index 859955c428..55b3a13ac7 100644 --- a/src/southbridge/via/k8t890/k8t890_traf_ctrl.c +++ b/src/southbridge/via/k8t890/k8t890_traf_ctrl.c @@ -58,7 +58,7 @@ static void apic_mmconfig_read_resources(device_t dev) res->limit = res->base + res->size - 1; res->align = 8; res->gran = 8; - res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; /* Add an MMCONFIG resource. */ @@ -67,7 +67,7 @@ static void apic_mmconfig_read_resources(device_t dev) res->align = log2(res->size); res->gran = log2(res->size); res->limit = 0xffffffff; /* 4G */ - res->flags = IORESOURCE_MEM; + res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE; } static void traf_ctrl_enable_generic(struct device *dev) diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c index 24865f6a29..72b85b37d5 100644 --- a/src/southbridge/via/vt8237r/vt8237r_lpc.c +++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c @@ -521,7 +521,7 @@ static void vt8237r_read_resources(device_t dev) res->base = VT8237R_ACPI_IO_BASE; res->size = 128; res->limit = 0xffffUL; - res->flags = IORESOURCE_IO | IORESOURCE_FIXED | + res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; /* Fixed EISA ECLR I/O Regs */ @@ -529,7 +529,7 @@ static void vt8237r_read_resources(device_t dev) res->base = 0x4d0; res->size = 2; res->limit = 0xffffUL; - res->flags = IORESOURCE_IO | IORESOURCE_FIXED | + res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; /* Fixed System Management Bus I/O Resource */ @@ -537,7 +537,7 @@ static void vt8237r_read_resources(device_t dev) res->base = VT8237R_SMBUS_IO_BASE; res->size = 16; res->limit = 0xffffUL; - res->flags = IORESOURCE_IO | IORESOURCE_FIXED | + res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; /* Fixed APIC resource */ @@ -547,7 +547,15 @@ static void vt8237r_read_resources(device_t dev) res->limit = 0xffffffffUL; res->align = 8; res->gran = 8; - res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + + /* Fixed flashrom resource */ + res = new_resource(dev, 4); + res->base = 0xff000000UL; + res->size = 0x01000000UL; /* 16MB */ + res->limit = 0xffffffffUL; + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; res = new_resource(dev, 1); -- cgit v1.2.3