From cadc54583877db65f33d2db11088d5fae1b77b74 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sat, 18 Dec 2010 23:29:37 +0000 Subject: SMM for AMD K8 Part 1/2 Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/via/vt8237r/lpc.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'src/southbridge/via/vt8237r/lpc.c') diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 72b85b37d5..3ffc377572 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -217,11 +218,8 @@ static void setup_pm(device_t dev) /* Disable SMI on GPIO. */ outw(0x0, VT8237R_ACPI_IO_BASE + 0x24); - /* Disable all global enable SMIs. */ - outw(0x0, VT8237R_ACPI_IO_BASE + 0x2a); - - /* All SMI off, both IDE buses ON, PSON rising edge. */ - outw(0x0, VT8237R_ACPI_IO_BASE + 0x2c); + /* Disable all global enable SMIs, except SW SMI */ + outw(0x40, VT8237R_ACPI_IO_BASE + 0x2a); /* Primary activity SMI disable. */ outl(0x0, VT8237R_ACPI_IO_BASE + 0x34); @@ -238,6 +236,10 @@ static void setup_pm(device_t dev) acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ; printk(BIOS_DEBUG, "SLP_TYP type was %x %x\n", tmp, acpi_slp_type); #endif + + /* All SMI on, both IDE buses ON, PSON rising edge. */ + outw(0x1, VT8237R_ACPI_IO_BASE + 0x2c); + /* clear sleep */ tmp &= ~(7 << 10); tmp |= 1; @@ -500,7 +502,9 @@ static void vt8237_common_init(struct device *dev) /* Enable serial IRQ, 6PCI clocks. */ pci_write_config8(dev, 0x52, 0x9); - +#endif +#if CONFIG_HAVE_SMI_HANDLER + smm_lock(); #endif /* Power management setup */ -- cgit v1.2.3