From 9fe4d797a37671a65053add3f7cca27397db0b9b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sat, 16 Jan 2010 17:53:38 +0000 Subject: coreboot used to have two different "APIs" for memory accesses: read32(unsigned long addr) vs readl(void *addr) and write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr) read32 was only available in __PRE_RAM__ stage, while readl was used in stage2. Some unclean implementations then made readl available to __PRE_RAM__ too which results in really messy includes and code. This patch fixes all code to use the read32/write32 variant, so that we can remove readl/writel in another patch. Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/sis/sis966/sis966_aza.c | 32 ++++++++++++++++---------------- src/southbridge/sis/sis966/sis966_nic.c | 18 +++++++++--------- src/southbridge/sis/sis966/sis966_usb2.c | 2 +- 3 files changed, 26 insertions(+), 26 deletions(-) (limited to 'src/southbridge/sis') diff --git a/src/southbridge/sis/sis966/sis966_aza.c b/src/southbridge/sis/sis966/sis966_aza.c index e8d67d063d..1dc91ae45d 100644 --- a/src/southbridge/sis/sis966/sis966_aza.c +++ b/src/southbridge/sis/sis966/sis966_aza.c @@ -48,14 +48,14 @@ static int set_bits(uint8_t *port, uint32_t mask, uint32_t val) int count; val &= mask; - dword = readl(port); + dword = read32(port); dword &= ~mask; dword |= val; - writel(dword, port); + write32(port, dword); count = 50; do { - dword = readl(port); + dword = read32(port); dword &= mask; udelay(100); } while ((dword != val) && --count); @@ -73,23 +73,23 @@ static int set_bits(uint8_t *port, uint32_t mask, uint32_t val) uint32_t dword; - dword = readl(base + 0x68); + dword = read32(base + 0x68); dword=dword|(unsigned long)0x0002; - writel(dword,base + 0x68); + write32(base + 0x68, dword); do { - dword = readl(base + 0x68); + dword = read32(base + 0x68); } while ((dword & 1)!=0); - writel(verb, base + 0x60); + write32(base + 0x60, verb); udelay(500); - dword = readl(base + 0x68); + dword = read32(base + 0x68); dword =(dword |0x1); - writel(dword, base + 0x68); + write32(base + 0x68, dword); do { udelay(100); - dword = readl(base + 0x68); + dword = read32(base + 0x68); } while ((dword & 3) != 2); - dword = readl(base + 0x64); + dword = read32(base + 0x64); return dword; } @@ -106,7 +106,7 @@ static int codec_detect(uint8_t *base) set_bits(base + 0x08, 1, 1); do{ - dword = readl(base + 0x08)&0x1; + dword = read32(base + 0x08)&0x1; if(idx++>1000) { printk_debug("controller reset fail !!! \n"); break;} } while (dword !=1); @@ -206,17 +206,17 @@ static void codec_init(uint8_t *base, int addr) /* 1 */ do { - dword = readl(base + 0x68); + dword = read32(base + 0x68); } while (dword & 1); dword = (addr<<28) | 0x000f0000; - writel(dword, base + 0x60); + write32(base + 0x60, dword); do { - dword = readl(base + 0x68); + dword = read32(base + 0x68); } while ((dword & 3)!=2); - dword = readl(base + 0x64); + dword = read32(base + 0x64); /* 2 */ printk_debug("codec viddid: %08x\n", dword); diff --git a/src/southbridge/sis/sis966/sis966_nic.c b/src/southbridge/sis/sis966/sis966_nic.c index 5d7e8c298c..9fadcf9419 100644 --- a/src/southbridge/sis/sis966/sis966_nic.c +++ b/src/southbridge/sis/sis966/sis966_nic.c @@ -144,13 +144,13 @@ static unsigned long ReadEEprom( struct device *dev, uint32_t base, uint32_t ulValue = (0x80 | (0x2 << 8) | (Reg << 10)); //BIT_7 - writel( ulValue,base+0x3c); + write32(base+0x3c, ulValue); mdelay(10); for(i=0 ; i <= LoopNum; i++) { - ulValue=readl(base+0x3c); + ulValue=read32(base+0x3c); if(!(ulValue & 0x0080)) //BIT_7 break; @@ -162,7 +162,7 @@ static unsigned long ReadEEprom( struct device *dev, uint32_t base, uint32_t if(i==LoopNum) data=0x10000; else{ - ulValue=readl(base+0x3c); + ulValue=read32(base+0x3c); data = ((ulValue & 0xffff0000) >> 16); } @@ -183,14 +183,14 @@ static int phy_read(uint32_t base, unsigned phy_addr, unsigned phy_reg) SMI_REQUEST); // SmiMgtInterface Reg is the SMI management interface register(offset 44h) of MAC - writel( Read_Cmd,base+0x44); + write32(base+0x44, Read_Cmd); // Polling SMI_REQ bit to be deasserted indicated read command completed do { // Wait 20 usec before checking status mdelay(20); - ulValue = readl(base+0x44); + ulValue = read32(base+0x44); } while((ulValue & SMI_REQUEST) != 0); //printk_debug("base %x cmd %lx ret val %lx\n", tmp,Read_Cmd,ulValue); usData=(ulValue>>16); @@ -282,7 +282,7 @@ static void nic_init(struct device *dev) return; } - ulValue=readl(base + 0x38L); // check EEPROM existing + ulValue=read32(base + 0x38L); // check EEPROM existing if((ulValue & 0x0002)) { @@ -303,9 +303,9 @@ static void nic_init(struct device *dev) }else{ // read MAC address from firmware printk_debug("EEPROM invalid!!\nReg 0x38h=%.8lx \n",ulValue); - MacAddr[0]=readw(0xffffffc0); // mac address store at here - MacAddr[1]=readw(0xffffffc2); - MacAddr[2]=readw(0xffffffc4); + MacAddr[0]=read16(0xffffffc0); // mac address store at here + MacAddr[1]=read16(0xffffffc2); + MacAddr[2]=read16(0xffffffc4); } set_apc(dev); diff --git a/src/southbridge/sis/sis966/sis966_usb2.c b/src/southbridge/sis/sis966/sis966_usb2.c index 4b3573b0ad..35dec13453 100644 --- a/src/southbridge/sis/sis966/sis966_usb2.c +++ b/src/southbridge/sis/sis966/sis966_usb2.c @@ -96,7 +96,7 @@ static void usb2_init(struct device *dev) base =(uint8_t *) res->base; printk_debug("base = %08x\n", base); - writel(0x2,base+0x20); + write32(base+0x20, 0x2); //----------------------------------------------------------- #if DEBUG_USB2 -- cgit v1.2.3