From 1858d6a90a81aac67cde90190d8a332b2e817c9d Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 21:30:42 -0600 Subject: src/southbridge: add IS_ENABLED() around Kconfig symbol references Change-Id: Ie965cbcf7f7b6f6c9e9a69e2a1ff0ba491246cbe Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20353 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/southbridge/nvidia/ck804/early_setup.c | 6 +++--- src/southbridge/nvidia/ck804/early_setup_car.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/southbridge/nvidia/ck804') diff --git a/src/southbridge/nvidia/ck804/early_setup.c b/src/southbridge/nvidia/ck804/early_setup.c index 79c9eff050..673c44d272 100644 --- a/src/southbridge/nvidia/ck804/early_setup.c +++ b/src/southbridge/nvidia/ck804/early_setup.c @@ -250,7 +250,7 @@ static void ck804_early_setup(void) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 8, ~(0xff), ((0 << 4) | (0 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 9, ~(0xff), ((0 << 4) | (1 << 2) | (1 << 0)), -#if CONFIG_CK804_USE_NIC +#if IS_ENABLED(CONFIG_CK804_USE_NIC) RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE +0xa, 0, 0xf8), 0xffffffbf, 0x00000040, RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), @@ -258,7 +258,7 @@ static void ck804_early_setup(void) RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE + 1 , 0, 0xe4), ~(1 << 23), (1 << 23), #endif -#if CONFIG_CK804_USE_ACI +#if IS_ENABLED(CONFIG_CK804_USE_ACI) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x0d, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)), #endif @@ -268,7 +268,7 @@ static void ck804_early_setup(void) #endif #if CONFIG_CK804_NUM > 1 -#if CONFIG_CK804_USE_NIC +#if IS_ENABLED(CONFIG_CK804_USE_NIC) RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE +0xa, 0, 0xf8), 0xffffffbf, 0x00000040, RES_PORT_IO_8, CK804B_SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), RES_PORT_IO_8, CK804B_SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index aeea41b551..6472abfe68 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -198,7 +198,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, /* SYSCTRL */ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 8, ~(0xff), ((0 << 4) | (0 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 9, ~(0xff), ((0 << 4) | (1 << 2) | (1 << 0)), -#if CONFIG_CK804_USE_NIC +#if IS_ENABLED(CONFIG_CK804_USE_NIC) RES_PCI_IO, PCI_ADDR(0, 0xa, 0, 0xf8), 0xffffffbf, 0x00000040, RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), @@ -206,7 +206,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe4), ~(1 << 23), (1 << 23), #endif -#if CONFIG_CK804_USE_ACI +#if IS_ENABLED(CONFIG_CK804_USE_ACI) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x0d, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)), #endif @@ -280,7 +280,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804B_PCI_E_X << 4) | (1 << 8), -#if CONFIG_CK804_USE_NIC +#if IS_ENABLED(CONFIG_CK804_USE_NIC) RES_PCI_IO, PCI_ADDR(0, 0xa, 0, 0xf8), 0xffffffbf, 0x00000040, RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), -- cgit v1.2.3