From fa1d688a787971bffd16c90b5a98bfc43b5cee2e Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sun, 19 Oct 2014 02:50:45 +0200 Subject: sandy/ivy native: dedup romstage.c main() Change-Id: I9909a5b2bdb4b59219db6304fa4332802fe0301c Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/7127 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/southbridge/intel/bd82x6x/gpio.h | 4 ++++ src/southbridge/intel/bd82x6x/pch.h | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/gpio.h b/src/southbridge/intel/bd82x6x/gpio.h index 44e808aaf1..6a646cca04 100644 --- a/src/southbridge/intel/bd82x6x/gpio.h +++ b/src/southbridge/intel/bd82x6x/gpio.h @@ -20,6 +20,8 @@ #ifndef INTEL_BD82X6X_GPIO_H #define INTEL_BD82X6X_GPIO_H +#include + #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 #define GPIO_MODE_NONE 1 @@ -147,6 +149,8 @@ struct pch_gpio_map { } set3; }; +extern const struct pch_gpio_map mainboard_gpio_map; + /* Configure GPIOs with mainboard provided settings */ void setup_pch_gpios(const struct pch_gpio_map *gpio); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 7a796df091..9b84c6706f 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -85,6 +85,10 @@ struct southbridge_usb_port int oc_pin; }; +#ifndef __ROMCC__ +extern const struct southbridge_usb_port mainboard_usb_ports[14]; +#endif + void early_usb_init (const struct southbridge_usb_port *portmap); -- cgit v1.2.3