From f9891c8b469232cca28f0b12f613274f127748df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Wed, 2 Oct 2019 23:29:07 +0300
Subject: kontron/986lcd-m,roda/rk886ex: Drop secondary PCI reset
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The extra PCI bus RST# and 200ms delay there was workaround
for custom add-on hardware.

Change-Id: I38c4677cfb41d620498be8e0c257b517995bad5c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35765
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
 src/southbridge/intel/i82801gx/i82801gx.h | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src/southbridge/intel')

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index fec891982f..d615b403ac 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -39,8 +39,6 @@
 void i82801gx_enable(struct device *dev);
 #endif
 
-void ich7_p2p_secondary_reset(void);
-
 void enable_smbus(void);
 
 #if ENV_ROMSTAGE
-- 
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