From e742b68f1ac9324ce1f700323f1226e86d068a8c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 10 Apr 2023 17:03:32 +0300 Subject: arch/x86/ioapic: Promote ioapic_get_sci_pin() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Platform needs to implement this to provide information about SCI IRQ pin and polarity, to be used for filling in ACPI FADT and MADT entries. Change-Id: Icea7e9ca4abf3997c01617d2f78f25036d85a52f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/74337 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/southbridge/intel/bd82x6x/fadt.c | 2 -- src/southbridge/intel/common/pmbase.c | 10 ++++++++++ src/southbridge/intel/i82371eb/fadt.c | 2 -- src/southbridge/intel/i82371eb/isa.c | 9 +++++++++ src/southbridge/intel/i82801dx/fadt.c | 2 -- src/southbridge/intel/i82801gx/fadt.c | 2 -- src/southbridge/intel/i82801ix/fadt.c | 2 -- src/southbridge/intel/i82801jx/fadt.c | 2 -- src/southbridge/intel/ibexpeak/fadt.c | 2 -- src/southbridge/intel/lynxpoint/fadt.c | 2 -- 10 files changed, 19 insertions(+), 16 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index 296ee2b878..31f2a068fa 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -12,8 +12,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) struct southbridge_intel_bd82x6x_config *chip = dev->chip_info; u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index 2fddfc9f87..872d994210 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -92,3 +93,12 @@ int platform_is_resuming(void) return acpi_get_sleep_type() == ACPI_S3; } + +#define ACPI_SCI_IRQ 9 + +void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags) +{ + *gsi = ACPI_SCI_IRQ; + *irq = ACPI_SCI_IRQ; + *flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH; +} diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index d83925da74..66ae2bb5bc 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -16,8 +16,6 @@ */ void acpi_fill_fadt(acpi_fadt_t *fadt) { - fadt->sci_int = 9; - if (permanent_smi_handler()) { /* TODO: SMI handler is not implemented. */ fadt->smi_cmd = 0x00; diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index c5329f4313..7d86e8a7ab 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -67,6 +67,15 @@ static void isa_init(struct device *dev) } } +#define ACPI_SCI_IRQ 9 + +void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags) +{ + *gsi = ACPI_SCI_IRQ; + *irq = ACPI_SCI_IRQ; + *flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH; +} + static void sb_read_resources(struct device *dev) { struct resource *res; diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index 5b0194854a..5015659c32 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -8,8 +8,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) { u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c index 3f97145281..7cdd631ee0 100644 --- a/src/southbridge/intel/i82801gx/fadt.c +++ b/src/southbridge/intel/i82801gx/fadt.c @@ -13,8 +13,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) struct southbridge_intel_i82801gx_config *chip = dev->chip_info; u16 pmbase = lpc_get_pmbase(); - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index 78443ea053..92fece2e41 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -9,8 +9,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) { u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index f0f4ca16e1..a2defd2fc8 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -9,8 +9,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) { u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index dfb9774fad..a917fb8458 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -12,8 +12,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) struct southbridge_intel_ibexpeak_config *chip = dev->chip_info; u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c index a90d0a857b..ee7b309d29 100644 --- a/src/southbridge/intel/lynxpoint/fadt.c +++ b/src/southbridge/intel/lynxpoint/fadt.c @@ -12,8 +12,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) struct southbridge_intel_lynxpoint_config *cfg = dev->chip_info; u16 pmbase = get_pmbase(); - fadt->sci_int = 0x9; - if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; -- cgit v1.2.3