From ae7ac8a72372e4099bcf0667b5f97b4a223da48d Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 12 Jan 2021 15:23:25 +0200 Subject: ACPI: Separate ChromeOS NVS in ASL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there is reduced dsdt.aml size and reduced GNVS allocation from cbmem. More importantly, it's less error-prone when the OperationRegion size is not hard-coded inside the .asl files. Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/acpi/globalnvs.asl | 4 ---- src/southbridge/intel/lynxpoint/acpi/globalnvs.asl | 4 ---- 2 files changed, 8 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index eafa3adacc..f64a845238 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -103,10 +103,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xf5), TPIQ, 8, // 0xf5 - trackpad IRQ value CBMC, 32, - - /* ChromeOS specific */ - Offset (0x100), - #include } /* Set flag to enable USB charging in S3 */ diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 179a9912cc..f4071f1144 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -93,10 +93,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xa0), CBMC, 32, // 0xa0 - coreboot mem console pointer - - /* ChromeOS specific */ - Offset (0x100), - #include } /* Set flag to enable USB charging in S3 */ -- cgit v1.2.3