From 5eea458822d394fd65a9b69f0b5b8e33c75065a8 Mon Sep 17 00:00:00 2001 From: Alexander Couzens Date: Sun, 12 Apr 2015 22:18:55 +0200 Subject: device_ops: add device_t argument to acpi_fill_ssdt_generator `device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I7fca8c3fa15c1be672e50e4422d7ac8e4aaa1e36 Signed-off-by: Alexander Couzens Reviewed-on: http://review.coreboot.org/9598 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/southbridge/intel/bd82x6x/lpc.c | 2 +- src/southbridge/intel/i82371eb/acpi_tables.c | 2 +- src/southbridge/intel/i82371eb/isa.c | 4 ++-- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/ibexpeak/lpc.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 0c24a0aff0..6bf43decef 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -797,7 +797,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe1_blk.addrh = 0x0; } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index c9192055ff..fa3029c7e5 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -45,7 +45,7 @@ static int determine_total_number_of_cores(void) return count; } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6; int numcpus = determine_total_number_of_cores(); diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 024604b339..61006e672c 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -129,10 +129,10 @@ static void sb_read_resources(struct device *dev) } #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) +static void southbridge_acpi_fill_ssdt_generator(device_t device) { acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS"); - generate_cpu_entries(); + generate_cpu_entries(device); } #endif diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 7c11310a88..ac1d49f8e3 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -562,7 +562,7 @@ static void southbridge_inject_dsdt(device_t dev) } } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 58a00d56fe..6565293f22 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -784,7 +784,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe1_blk.addrh = 0x0; } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; -- cgit v1.2.3