From 298aa98b816e769f4cedd0b2a0e7e7da656aa18b Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 21 Jun 2020 18:02:08 +0200
Subject: sb/intel/i82801ix: Use common early SPI code

Change-Id: Iafcf7aecb20b4c8be79fa562ff267fd54f672862
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
---
 src/southbridge/intel/i82801ix/bootblock.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

(limited to 'src/southbridge/intel')

diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index 479c5880bd..7a66b47de0 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -2,16 +2,12 @@
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
+#include <southbridge/intel/common/early_spi.h>
 #include "i82801ix.h"
 
-static void enable_spi_prefetch(void)
-{
-	pci_update_config8(PCI_DEV(0, 0x1f, 0), 0xdc, ~(3 << 2), 2 << 2);
-}
-
 void bootblock_early_southbridge_init(void)
 {
-	enable_spi_prefetch();
+	enable_spi_prefetching_and_caching();
 
 	i82801ix_early_init();
 	i82801ix_lpc_setup();
-- 
cgit v1.2.3