From 1aeccd1440bad190f82b5e12b1057680ffd206c3 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 7 Oct 2020 13:18:55 -0500 Subject: sb/intel/lynxpoint/pcie.c: fix typo in comment Change-Id: I741b66e08d977f514f2512d626e3bcf22ce7d46c Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/46135 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Paul Menzel --- src/southbridge/intel/lynxpoint/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 2da14ed5f0..0ede943ceb 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -659,7 +659,7 @@ static void pch_pcie_early(struct device *dev) pci_update_config32(dev, 0x33c, ~0x00ffffff, 0x854c74); - /* Set Invalid Recieve Range Check Enable in MPC register. */ + /* Set Invalid Receive Range Check Enable in MPC register. */ pci_or_config32(dev, 0xd8, 1 << 25); pci_and_config8(dev, 0xf5, 0x3f); -- cgit v1.2.3