From 11cac784ff788b4f0495758d7f5992e457ea552c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 7 Apr 2022 07:16:48 +0300 Subject: Replace some ENV_ROMSTAGE with ENV_RAMINIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With a combined bootblock+romstage ENV_ROMSTAGE might no longer evaluate true. Change-Id: I733cf4e4ab177e35cd260318556ece1e73d082dc Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/63376 Reviewed-by: Julius Werner Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas Reviewed-by: Raul Rangel --- src/southbridge/intel/bd82x6x/early_pch.c | 2 +- src/southbridge/intel/i82801gx/early_init.c | 2 +- src/southbridge/intel/i82801ix/early_init.c | 2 +- src/southbridge/intel/i82801jx/early_init.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 6ed3dce8b9..bbbc5e6f7a 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -310,6 +310,6 @@ void early_pch_init(void) setup_pch_gpios(&mainboard_gpio_map); - if (ENV_ROMSTAGE) + if (ENV_RAMINIT) enable_smbus(); } diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index 4647bf1c6a..3a0e0b1d77 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -57,7 +57,7 @@ void i82801gx_setup_bars(void) #define TCO_BASE 0x60 -#if ENV_ROMSTAGE +#if ENV_RAMINIT void i82801gx_early_init(void) { enable_smbus(); diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index f781098f33..b8bc9d83c9 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -47,7 +47,7 @@ void i82801ix_early_init(void) { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0); - if (ENV_ROMSTAGE) + if (ENV_RAMINIT) enable_smbus(); /* Set up RCBA. */ diff --git a/src/southbridge/intel/i82801jx/early_init.c b/src/southbridge/intel/i82801jx/early_init.c index 327c8fc0a5..f7e880cf9e 100644 --- a/src/southbridge/intel/i82801jx/early_init.c +++ b/src/southbridge/intel/i82801jx/early_init.c @@ -69,7 +69,7 @@ void i82801jx_early_init(void) { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0); - if (ENV_ROMSTAGE) + if (ENV_RAMINIT) enable_smbus(); printk(BIOS_DEBUG, "Setting up static southbridge registers..."); -- cgit v1.2.3