From 04a40379b0cbc96c25498ec69520cb7cd85f3fe4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 6 Jun 2021 08:04:28 +0300 Subject: sb,soc/intel: Set IOAPIC redirection entry count MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The number of redirection table entries (aka interrupt vectors) inside an I/O APIC may depend of the SKU, with the related register being of type read/write-once. Provide support utilities to either lock or set this registers value. Change-Id: I8da869ba390dd821b43032e4ccbc9291c39e6bab Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55289 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/southbridge/intel/lynxpoint/lpc.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) (limited to 'src/southbridge/intel/lynxpoint') diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index d0eb4b33f0..ef75d2f77d 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -31,8 +31,6 @@ */ static void pch_enable_ioapic(struct device *dev) { - u32 reg32; - /* Assign unique bus/dev/fn for I/O APIC */ pci_write_config16(dev, LPC_IBDF, PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3); @@ -40,13 +38,11 @@ static void pch_enable_ioapic(struct device *dev) set_ioapic_id(VIO_APIC_VADDR, 0x02); /* affirm full set of redirection table entries ("write once") */ - reg32 = io_apic_read(VIO_APIC_VADDR, 0x01); - if (pch_is_lp()) { - /* PCH-LP has 39 redirection entries */ - reg32 &= ~0x00ff0000; - reg32 |= 0x00270000; - } - io_apic_write(VIO_APIC_VADDR, 0x01, reg32); + /* PCH-LP has 40 redirection entries */ + if (pch_is_lp()) + ioapic_set_max_vectors(VIO_APIC_VADDR, 40); + else + ioapic_lock_max_vectors(VIO_APIC_VADDR); } static void pch_enable_serial_irqs(struct device *dev) -- cgit v1.2.3