From 7922b468b51eea58c7238f11b21820b8d3747d6b Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Fri, 8 Mar 2013 16:34:33 -0800 Subject: lynxpoint: Fix GPIO and PM base reservations The kernel ACPI was not happy with the Add inside a ResourceTemplate (or perhaps within the IO declaration) Instead make a buffer of IO reservations and turn _CRS into a method that updates the buffer depending on the chipset type. This adds an \ISLP() method that checks the chipset LPC device ID to see if it is -LP or -H. It also increases the PM base reservation to 256 bytes and moves both GPIO and PM base to above 0x1000 on -LP chipsets. Change-Id: I747b658588a4d8ed15a0134009a7c0d74b3916ba Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/2815 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/southbridge/intel/lynxpoint/lpc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/lynxpoint/lpc.c') diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 89cf9e7c01..89d7350364 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -630,11 +630,11 @@ static void pch_lpc_add_io_resources(device_t dev) res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; /* GPIOBASE */ - pch_lpc_add_io_resource(dev, DEFAULT_GPIOBASE, DEFAULT_GPIOSIZE, + pch_lpc_add_io_resource(dev, get_gpiobase(), DEFAULT_GPIOSIZE, GPIO_BASE); /* PMBASE */ - pch_lpc_add_io_resource(dev, DEFAULT_PMBASE, 128, PMBASE); + pch_lpc_add_io_resource(dev, get_pmbase(), 256, PMBASE); /* LPC Generic IO Decode range. */ pch_lpc_add_gen_io_resources(dev, config->gen1_dec, LPC_GEN1_DEC); -- cgit v1.2.3